mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 07:16:04 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
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* All rights reserved.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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#include <asm/arch/fpga_manager.h>
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#include <asm/arch/reset_manager.h>
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#include <asm/arch/system_manager.h>
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/* Timeout count */
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#define FPGA_TIMEOUT_CNT 0x1000000
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static struct socfpga_fpga_manager *fpgamgr_regs =
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(struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
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int fpgamgr_dclkcnt_set(unsigned long cnt)
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{
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unsigned long i;
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/* Clear any existing done status */
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if (readl(&fpgamgr_regs->dclkstat))
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writel(0x1, &fpgamgr_regs->dclkstat);
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/* Write the dclkcnt */
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writel(cnt, &fpgamgr_regs->dclkcnt);
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/* Wait till the dclkcnt done */
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for (i = 0; i < FPGA_TIMEOUT_CNT; i++) {
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if (!readl(&fpgamgr_regs->dclkstat))
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continue;
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writel(0x1, &fpgamgr_regs->dclkstat);
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return 0;
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}
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return -ETIMEDOUT;
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}
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/* Write the RBF data to FPGA Manager */
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void fpgamgr_program_write(const void *rbf_data, size_t rbf_size)
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{
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uint32_t src = (uint32_t)rbf_data;
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uint32_t dst = SOCFPGA_FPGAMGRDATA_ADDRESS;
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/* Number of loops for 32-byte long copying. */
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uint32_t loops32 = rbf_size / 32;
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/* Number of loops for 4-byte long copying + trailing bytes */
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uint32_t loops4 = DIV_ROUND_UP(rbf_size % 32, 4);
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asm volatile(
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" cmp %2, #0\n"
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" beq 2f\n"
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"1: ldmia %0!, {r0-r7}\n"
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" stmia %1!, {r0-r7}\n"
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" sub %1, #32\n"
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" subs %2, #1\n"
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" bne 1b\n"
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"2: cmp %3, #0\n"
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" beq 4f\n"
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"3: ldr %2, [%0], #4\n"
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" str %2, [%1]\n"
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" subs %3, #1\n"
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" bne 3b\n"
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"4: nop\n"
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: "+r"(src), "+r"(dst), "+r"(loops32), "+r"(loops4) :
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "cc");
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}
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