mirror of
https://github.com/brain-hackers/u-boot-brain
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35b65dd8ef
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to. This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value. Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.
Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g. COLD vs WARM resets). As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).
To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely. Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.
This transformation was done with the following coccinelle patch:
@@
expression argvalue;
@@
- reset_cpu(argvalue)
+ reset_cpu()
@@
identifier argname;
type argtype;
@@
- reset_cpu(argtype argname)
+ reset_cpu(void)
{ ... }
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
133 lines
2.3 KiB
C
133 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/**
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* (C) Copyright 2014, Cavium Inc.
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**/
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#include <common.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <init.h>
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#include <malloc.h>
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#include <errno.h>
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#include <net.h>
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#include <asm/global_data.h>
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#include <linux/compiler.h>
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#include <cavium/atf.h>
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#include <asm/armv8/mmu.h>
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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#include <dm/platform_data/serial_pl01x.h>
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static const struct pl01x_serial_plat serial0 = {
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.base = CONFIG_SYS_SERIAL0,
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.type = TYPE_PL011,
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.clock = 0,
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.skip_init = true,
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};
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U_BOOT_DRVINFO(thunderx_serial0) = {
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.name = "serial_pl01x",
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.plat = &serial0,
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};
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static const struct pl01x_serial_plat serial1 = {
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.base = CONFIG_SYS_SERIAL1,
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.type = TYPE_PL011,
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.clock = 0,
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.skip_init = true,
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};
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U_BOOT_DRVINFO(thunderx_serial1) = {
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.name = "serial_pl01x",
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.plat = &serial1,
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};
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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static struct mm_region thunderx_mem_map[] = {
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{
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.virt = 0x000000000000UL,
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.phys = 0x000000000000UL,
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.size = 0x40000000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
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}, {
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.virt = 0x800000000000UL,
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.phys = 0x800000000000UL,
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.size = 0x40000000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE,
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}, {
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.virt = 0x840000000000UL,
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.phys = 0x840000000000UL,
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.size = 0x40000000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE,
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map = thunderx_mem_map;
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int board_init(void)
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{
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return 0;
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}
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int timer_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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ssize_t node_count = atf_node_count();
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ssize_t dram_size;
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int node;
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printf("Initializing\nNodes in system: %zd\n", node_count);
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gd->ram_size = 0;
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for (node = 0; node < node_count; node++) {
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dram_size = atf_dram_size(node);
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printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
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gd->ram_size += dram_size;
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}
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gd->ram_size -= MEM_BASE;
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*(unsigned long *)CPU_RELEASE_ADDR = 0;
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puts("DRAM size:");
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return 0;
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}
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/*
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* Board specific reset that is system reset.
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*/
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void reset_cpu(void)
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{
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}
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/*
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* Board specific ethernet initialization routine.
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*/
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int board_eth_init(struct bd_info *bis)
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{
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int rc = 0;
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return rc;
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}
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#ifdef CONFIG_PCI
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void pci_init_board(void)
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{
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printf("DEBUG: PCI Init TODO *****\n");
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}
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#endif
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