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https://github.com/brain-hackers/u-boot-brain
synced 2024-09-21 12:10:24 +09:00
24b56e2bf3
Basin Cove PMIC is connected to I2C0 bus which is hidden from the OS and access is going via SCU device, enumerated via PCI. For now, we add just a minimum support of PMIC device to allow enabling, e.g. USB OTG, in the OS. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
439 lines
12 KiB
Plaintext
439 lines
12 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* Partially based on southcluster.asl for other x86 platforms
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*/
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Device (PCI0)
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{
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Name (_HID, EISAID("PNP0A08")) /* PCIe */
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Name (_CID, EISAID("PNP0A03")) /* PCI */
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Name (_ADR, 0)
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Name (_BBN, 0)
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Name (MCRS, ResourceTemplate()
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{
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/* Bus Numbers */
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WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
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0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
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/* IO Region 0 */
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
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/* PCI Config Space */
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IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
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/* IO Region 1 */
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WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
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0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
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/* GPIO Low Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x000ddcc0, 0x000ddccf, 0x00000000,
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0x00000010, , , GP00)
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/* PSH Memory Region 0 */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x04819000, 0x04898fff, 0x00000000,
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0x00080000, , , PSH0)
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/* PSH Memory Region 1 */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x04919000, 0x04920fff, 0x00000000,
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0x00008000, , , PSH1)
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/* SST Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x05e00000, 0x05ffffff, 0x00000000,
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0x00200000, , , SST0)
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/* PCI Memory Region */
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DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
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Cacheable, ReadWrite,
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0x00000000, 0x80000000, 0xffffffff, 0x00000000,
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0x80000000, , , PMEM)
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})
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Method (_CRS, 0, Serialized)
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{
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Return (MCRS)
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}
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Method (_OSC, 4)
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{
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/* Check for proper GUID */
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If (LEqual(Arg0, ToUUID("33db4d5b-1ff7-401c-9657-7441c03dd766"))) {
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/* Let OS control everything */
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Return (Arg3)
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} Else {
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/* Unrecognized UUID */
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CreateDWordField(Arg3, 0, CDW1)
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Or(CDW1, 4, CDW1)
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Return (Arg3)
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}
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}
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Device (SDHC)
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{
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Name (_ADR, 0x00010003)
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Name (_DEP, Package (0x01)
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{
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GPIO
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})
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Name (PSTS, Zero)
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Method (_PS3, 0, NotSerialized)
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{
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}
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Method (_PS0, 0, NotSerialized)
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{
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If (PSTS == Zero)
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{
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If (^^GPIO.AVBL == One)
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{
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^^GPIO.WFD3 = One
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PSTS = One
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}
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}
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}
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/* BCM43340 */
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Device (BRC1)
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{
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Name (_ADR, 0x01)
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Name (_DEP, Package (0x01)
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{
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GPIO
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})
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Method (_RMV, 0, NotSerialized)
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{
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Return (Zero)
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}
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Method (_PS3, 0, NotSerialized)
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{
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If (^^^GPIO.AVBL == One)
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{
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^^^GPIO.WFD3 = Zero
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PSTS = Zero
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}
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}
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Method (_PS0, 0, NotSerialized)
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{
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If (PSTS == Zero)
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{
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If (^^^GPIO.AVBL == One)
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{
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^^^GPIO.WFD3 = One
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PSTS = One
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}
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}
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}
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}
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Device (BRC2)
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{
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Name (_ADR, 0x02)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Method (_RMV, 0, NotSerialized)
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{
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Return (Zero)
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}
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}
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}
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Device (SPI5)
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{
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Name (_ADR, 0x00070001)
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Name (RBUF, ResourceTemplate()
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{
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 110 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 111 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 }
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GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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Return (RBUF)
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}
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/*
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* See
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* http://www.kernel.org/doc/Documentation/acpi/gpio-properties.txt
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* for more information about GPIO bindings.
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*/
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Name (_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package () {
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Package () {
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"cs-gpios", Package () {
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^SPI5, 0, 0, 0,
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^SPI5, 1, 0, 0,
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^SPI5, 2, 0, 0,
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^SPI5, 3, 0, 0,
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},
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},
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}
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (I2C1)
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{
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Name (_ADR, 0x00080000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (I2C6)
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{
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Name (_ADR, 0x00090001)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (GPIO)
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{
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Name (_ADR, 0x000c0000)
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Method (_STA)
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{
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Return (STA_VISIBLE)
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}
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Name (AVBL, Zero)
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Method (_REG, 2, NotSerialized)
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{
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If (Arg0 == 0x08)
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{
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AVBL = Arg1
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}
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}
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OperationRegion (GPOP, GeneralPurposeIo, 0, 1)
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Field (GPOP, ByteAcc, NoLock, Preserve)
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{
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Connection (
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GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 96 }
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),
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WFD3, 1,
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}
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}
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Device (PWM0)
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{
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Name (_ADR, 0x00170000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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Device (HSU0)
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{
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Name (_ADR, 0x00040001)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Device (BTH0)
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{
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Name (_HID, "BCM2E95")
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Name (_DEP, Package ()
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{
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GPIO,
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HSU0
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Method (_CRS, 0, Serialized)
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{
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Name (RBUF, ResourceTemplate()
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{
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UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne,
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0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
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0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
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GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
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GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
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GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
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"\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
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})
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Return (RBUF)
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}
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Name (_DSD, Package () {
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ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
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Package () {
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Package () { "host-wakeup-gpios", Package () { ^BTH0, 0, 0, 0 } },
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Package () { "device-wakeup-gpios", Package () { ^BTH0, 1, 0, 0 } },
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Package () { "shutdown-gpios", Package () { ^BTH0, 2, 0, 0 } },
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}
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})
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}
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}
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Device (IPC1)
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{
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Name (_ADR, 0x00130000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Device (PMIC)
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{
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Name (_ADR, Zero)
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Name (_HID, "INTC100E")
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Name (_CID, "INTC100E")
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Name (_DDN, "Basin Cove PMIC")
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Name (_DEP, Package ()
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{
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IPC1
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Method (_CRS, 0, Serialized)
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{
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Name (RBUF, ResourceTemplate()
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{
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/*
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* Shadow registers in SRAM for PMIC:
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* SRAM PMIC register
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* --------------------
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* 0x00- Unknown
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* 0x03 THRMIRQ (0x04)
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* 0x04 BCUIRQ (0x05)
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* 0x05 ADCIRQ (0x06)
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* 0x06 CHGRIRQ0 (0x07)
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* 0x07 CHGRIRQ1 (0x08)
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* 0x08- Unknown
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* 0x0a PBSTATUS (0x27)
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* 0x0b- Unknown
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*/
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Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
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})
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Return (RBUF)
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}
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OperationRegion (PMOP, 0x8D, Zero, 0x0100)
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Field (PMOP, DWordAcc, NoLock, Preserve)
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{
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SEL1, 32,
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SEL2, 32,
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VCCL, 32,
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VNNL, 32,
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AONL, 32,
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CNTC, 32,
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CNTN, 32,
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AONN, 32,
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CNT1, 32,
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CNT2, 32,
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CNT3, 32,
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FLEX, 32,
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PRG1, 32,
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PRG2, 32,
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PRG3, 32,
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VLDO, 32,
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}
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Name (AVBL, Zero)
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Method (_REG, 2, NotSerialized)
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{
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If ((Arg0 == 0x8D))
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{
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AVBL = Arg1
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}
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}
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}
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}
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}
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Device (FLIS)
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{
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Name (_HID, "INTC1002")
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Name (_DDN, "Intel Merrifield Family-Level Interface Shim")
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Name (RBUF, ResourceTemplate()
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{
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Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000)
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PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 }
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PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 }
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PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 }
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PinGroup("uart2", ResourceProducer, ) { 123, 124, 125, 126 }
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PinGroup("pwm0", ResourceProducer, ) { 144 }
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PinGroup("pwm1", ResourceProducer, ) { 145 }
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PinGroup("pwm2", ResourceProducer, ) { 132 }
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PinGroup("pwm3", ResourceProducer, ) { 133 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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Return (RBUF)
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}
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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}
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