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https://github.com/brain-hackers/u-boot-brain
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71 lines
1.4 KiB
Plaintext
71 lines
1.4 KiB
Plaintext
menu "SPARC architecture"
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depends on SPARC
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config LEON
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bool
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config LEON2
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bool
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select LEON
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config LEON3
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bool
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select LEON
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config SYS_SPARC_NWINDOWS
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int "Number of SPARC register windows"
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range 2 32
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default "8"
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help
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Specify the number of SPARC register windows implemented by this
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processor. A SPARC implementation can have from 2 to 32 windows.
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If unsure, choose 8.
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choice
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prompt "Board select"
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optional
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config TARGET_GRSIM_LEON2
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bool "GRSIM simulating a LEON2 board"
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select LEON2
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config TARGET_GR_CPCI_AX2000
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bool "Gaisler GR-CPCI-AX2000 board"
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select LEON3
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config TARGET_GR_EP2S60
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bool "Gaisler Template design for Altera NIOS board with Stratix EP2S60"
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select LEON3
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help
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Gaisler Research AB's Template design (GPL Open Source SPARC/LEON3
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96MHz) for Altera NIOS Development board Stratix II edition,
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with the FPGA device EP2S60.
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config TARGET_GR_XC3S_1500
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bool "Gaisler GR-XC3S-1500 spartan board"
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select LEON3
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config TARGET_GRSIM
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bool "GRSIM simulating a LEON3 GR-XC3S-1500 board"
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select LEON3
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endchoice
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config SYS_ARCH
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default "sparc"
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config SYS_CPU
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default "leon2" if LEON2
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default "leon3" if LEON3
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config SYS_VENDOR
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default "gaisler"
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source "board/gaisler/gr_cpci_ax2000/Kconfig"
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source "board/gaisler/gr_ep2s60/Kconfig"
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source "board/gaisler/gr_xc3s_1500/Kconfig"
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source "board/gaisler/grsim/Kconfig"
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source "board/gaisler/grsim_leon2/Kconfig"
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endmenu
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