Kyle Moffett e820a131f4 fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC ... The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit integer divide operations to convert between nanoseconds and DDR clock cycles given arbitrary DDR clock frequencies. Since all of the inputs to this are 32-bit (nanoseconds, clock cycles, and DDR frequencies), we can easily restructure the computation to use the "do_div()" function to perform 64-bit/32-bit divide operations. On 64-bit this change is basically a no-op, because do_div is implemented as a literal 64-bit divide operation and the instruction scheduling works out almost the same. On 32-bit PowerPC a fully accurate 64/64 divide (__udivdi3 in libgcc) is over 1.1kB of code and thousands of heavily dependent cycles to compute, all of which is linked from libgcc. Another 1.2kB of code comes in for the function __umoddi3. It should be noted that nothing else in U-Boot or the Linux kernel seems to require a full 64-bit divide on my 32-bit PowerPC. Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Acked-by: York Sun <yorksun@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-04-04 09:24:43 -05:00
..
cpu	fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC	2011-04-04 09:24:43 -05:00
include/asm	powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020	2011-04-04 09:24:43 -05:00
lib	powerpc: Add cpu_secondary_init_r to allow for initialization post env setup	2011-04-04 09:24:41 -05:00
config.mk	Introduce a new linker flag LDFLAGS_FINAL	2011-03-22 23:32:06 +01:00