mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 17:08:52 +09:00
![Tom Rini](/assets/img/avatar_default.png)
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
177 lines
5.4 KiB
C
177 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2017-2018 NXP
|
|
*/
|
|
|
|
#ifndef __IMX8QM_ROM7720_H
|
|
#define __IMX8QM_ROM7720_H
|
|
|
|
#include <linux/sizes.h>
|
|
#include <asm/arch/imx-regs.h>
|
|
#define CONFIG_REMAKE_ELF
|
|
|
|
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
|
|
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
|
|
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
|
|
|
|
#undef CONFIG_BOOTM_NETBSD
|
|
|
|
#define CONFIG_FSL_USDHC
|
|
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
|
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
|
|
|
|
#define CONFIG_ENV_OVERWRITE
|
|
|
|
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
|
|
/* FUSE command */
|
|
#define CONFIG_CMD_FUSE
|
|
|
|
/* Boot M4 */
|
|
#define M4_BOOT_ENV \
|
|
"m4_0_image=m4_0.bin\0" \
|
|
"m4_1_image=m4_1.bin\0" \
|
|
"loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
|
|
"loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
|
|
"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
|
|
"m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
|
|
|
|
#ifdef CONFIG_NAND_BOOT
|
|
#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
|
|
#else
|
|
#define MFG_NAND_PARTITION ""
|
|
#endif
|
|
|
|
#define CONFIG_MFG_ENV_SETTINGS \
|
|
"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
|
|
"rdinit=/linuxrc " \
|
|
"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
|
|
"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
|
|
"g_mass_storage.iSerialNumber=\"\" "\
|
|
MFG_NAND_PARTITION \
|
|
"clk_ignore_unused "\
|
|
"\0" \
|
|
"initrd_addr=0x83800000\0" \
|
|
"initrd_high=0xffffffffffffffff\0" \
|
|
"bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
|
|
|
|
/* Initial environment variables */
|
|
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
CONFIG_MFG_ENV_SETTINGS \
|
|
M4_BOOT_ENV \
|
|
"script=boot.scr\0" \
|
|
"image=Image\0" \
|
|
"panel=NULL\0" \
|
|
"console=ttyLP0\0" \
|
|
"fdt_addr=0x83000000\0" \
|
|
"fdt_high=0xffffffffffffffff\0" \
|
|
"boot_fdt=try\0" \
|
|
"fdt_file=imx8qm-rom7720-a1.dtb\0" \
|
|
"initrd_addr=0x83800000\0" \
|
|
"initrd_high=0xffffffffffffffff\0" \
|
|
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
|
|
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
|
|
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
|
|
"mmcautodetect=yes\0" \
|
|
"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
|
|
"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
|
"bootscript=echo Running bootscript from mmc ...; " \
|
|
"source\0" \
|
|
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
|
|
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
|
|
"mmcboot=echo Booting from mmc ...; " \
|
|
"run mmcargs; " \
|
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
|
"if run loadfdt; then " \
|
|
"booti ${loadaddr} - ${fdt_addr}; " \
|
|
"else " \
|
|
"echo WARN: Cannot load the DT; " \
|
|
"fi; " \
|
|
"else " \
|
|
"echo wait for boot; " \
|
|
"fi;\0" \
|
|
"netargs=setenv bootargs console=${console},${baudrate} " \
|
|
"root=/dev/nfs " \
|
|
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
|
|
"netboot=echo Booting from net ...; " \
|
|
"run netargs; " \
|
|
"if test ${ip_dyn} = yes; then " \
|
|
"setenv get_cmd dhcp; " \
|
|
"else " \
|
|
"setenv get_cmd tftp; " \
|
|
"fi; " \
|
|
"${get_cmd} ${loadaddr} ${image}; " \
|
|
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
|
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
|
|
"booti ${loadaddr} - ${fdt_addr}; " \
|
|
"else " \
|
|
"echo WARN: Cannot load the DT; " \
|
|
"fi; " \
|
|
"else " \
|
|
"booti; " \
|
|
"fi;\0"
|
|
|
|
#define CONFIG_BOOTCOMMAND \
|
|
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
|
"if run loadbootscript; then " \
|
|
"run bootscript; " \
|
|
"else " \
|
|
"if run loadimage; then " \
|
|
"run mmcboot; " \
|
|
"else run netboot; " \
|
|
"fi; " \
|
|
"fi; " \
|
|
"else booti ${loadaddr} - ${fdt_addr}; fi"
|
|
|
|
/* Link Definitions */
|
|
#define CONFIG_LOADADDR 0x80280000
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
|
|
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
|
|
|
|
/* Default environment is in SD */
|
|
|
|
#ifdef CONFIG_QSPI_BOOT
|
|
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
|
|
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
|
|
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
|
|
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
|
|
#else
|
|
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
|
|
#endif
|
|
|
|
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
|
|
|
|
/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
|
|
* USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
|
|
* USDHC2 is for SD, USDHC3 is for SD on base board
|
|
*/
|
|
#define CONFIG_SYS_MMC_ENV_DEV 2 /* USDHC3 */
|
|
#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
|
|
#define CONFIG_SYS_FSL_USDHC_NUM 3
|
|
|
|
/* Size of malloc() pool */
|
|
#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
|
|
|
|
#define CONFIG_SYS_SDRAM_BASE 0x80000000
|
|
#define PHYS_SDRAM_1 0x80000000
|
|
#define PHYS_SDRAM_2 0x880000000
|
|
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
|
|
/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
|
|
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
|
|
|
|
#define CONFIG_SYS_MEMTEST_START 0xA0000000
|
|
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_1_SIZE >> 2))
|
|
|
|
/* Serial */
|
|
#define CONFIG_BAUDRATE 115200
|
|
|
|
/* Generic Timer Definitions */
|
|
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
|
|
|
|
/* Networking */
|
|
#define CONFIG_FEC_XCV_TYPE RGMII
|
|
#define FEC_QUIRK_ENET_MAC
|
|
|
|
#endif /* __IMX8QM_ROM7720_H */
|