mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
123 lines
2.5 KiB
C
123 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2009
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* Heiko Schocher, DENX Software Engineering, hs@denx.de
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#define CONFIG_NAND_MODE_REG (void *)(CONFIG_SYS_NAND_BASE + 0x20000)
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#define CONFIG_NAND_DATA_REG (void *)(CONFIG_SYS_NAND_BASE + 0x30000)
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#define read_mode() in_8(CONFIG_NAND_MODE_REG)
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#define write_mode(val) out_8(CONFIG_NAND_MODE_REG, val)
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#define read_data() in_8(CONFIG_NAND_DATA_REG)
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#define write_data(val) out_8(CONFIG_NAND_DATA_REG, val)
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#define KPN_RDY2 (1 << 7)
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#define KPN_RDY1 (1 << 6)
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#define KPN_WPN (1 << 4)
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#define KPN_CE2N (1 << 3)
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#define KPN_CE1N (1 << 2)
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#define KPN_ALE (1 << 1)
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#define KPN_CLE (1 << 0)
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#define KPN_DEFAULT_CHIP_DELAY 50
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static int kpn_chip_ready(void)
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{
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if (read_mode() & KPN_RDY1)
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return 1;
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return 0;
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}
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static void kpn_wait_rdy(void)
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{
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int cnt = 1000000;
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while (--cnt && !kpn_chip_ready())
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udelay(1);
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if (!cnt)
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printf ("timeout while waiting for RDY\n");
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}
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static void kpn_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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u8 reg_val = read_mode();
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if (ctrl & NAND_CTRL_CHANGE) {
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reg_val = reg_val & ~(KPN_ALE + KPN_CLE);
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if (ctrl & NAND_CLE)
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reg_val = reg_val | KPN_CLE;
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if (ctrl & NAND_ALE)
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reg_val = reg_val | KPN_ALE;
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if (ctrl & NAND_NCE)
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reg_val = reg_val & ~KPN_CE1N;
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else
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reg_val = reg_val | KPN_CE1N;
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write_mode(reg_val);
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}
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if (cmd != NAND_CMD_NONE)
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write_data(cmd);
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/* wait until flash is ready */
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kpn_wait_rdy();
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}
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static u_char kpn_nand_read_byte(struct mtd_info *mtd)
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{
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return read_data();
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}
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static void kpn_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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write_data(buf[i]);
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kpn_wait_rdy();
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}
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}
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static void kpn_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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int i;
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for (i = 0; i < len; i++)
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buf[i] = read_data();
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}
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static int kpn_nand_dev_ready(struct mtd_info *mtd)
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{
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kpn_wait_rdy();
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return 1;
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}
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int board_nand_init(struct nand_chip *nand)
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{
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#if defined(CONFIG_NAND_ECC_BCH)
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nand->ecc.mode = NAND_ECC_SOFT_BCH;
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#else
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nand->ecc.mode = NAND_ECC_SOFT;
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#endif
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/* Reference hardware control function */
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nand->cmd_ctrl = kpn_nand_hwcontrol;
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nand->read_byte = kpn_nand_read_byte;
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nand->write_buf = kpn_nand_write_buf;
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nand->read_buf = kpn_nand_read_buf;
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nand->dev_ready = kpn_nand_dev_ready;
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nand->chip_delay = KPN_DEFAULT_CHIP_DELAY;
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/* reset mode register */
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write_mode(KPN_CE1N + KPN_CE2N + KPN_WPN);
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return 0;
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}
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