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https://github.com/brain-hackers/u-boot-brain
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e78b04f9d5
The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
54 lines
1.1 KiB
C
54 lines
1.1 KiB
C
/*
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* Copyright (c) 2016 Andreas Färber
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK3368_COMMON_H
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#define __CONFIG_RK3368_COMMON_H
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#include <asm/arch/hardware.h>
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#include <linux/sizes.h>
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#define CONFIG_SYS_SDRAM_BASE 0
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#define SDRAM_MAX_SIZE 0xff000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_TEXT_BASE 0x00200000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
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#define CONFIG_SYS_LOAD_ADDR 0x00280000
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#define CONFIG_BOUNCE_BUFFER
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#ifndef CONFIG_SPL_BUILD
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00500000\0" \
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"pxefile_addr_r=0x00600000\0" \
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"fdt_addr_r=0x5600000\0" \
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"kernel_addr_r=0x280000\0" \
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"ramdisk_addr_r=0x5bf0000\0"
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#include <config_distro_defaults.h>
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#define BOOT_TARGET_DEVICES(func)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV
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#endif
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#endif
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