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![Masahiro Yamada](/assets/img/avatar_default.png)
This commit converts UniPhier on-chip serial driver to driver model. Since UniPhier SoCs do not have Device Tree support, some board files should be added under arch/arm/cpu/armv7/uniphier/ph1-*/ directories. (Device Tree support for UniPhier platform is still under way.) Now the base address and master clock frequency are passed from platform data, so CONFIG_SYS_UNIPHIER_SERIAL_BASE* and CONFIG_SYS_UNIPHIER_UART_CLK should be removed. Tested on UniPhier PH1-LD4 ref board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
152 lines
3.5 KiB
C
152 lines
3.5 KiB
C
/*
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* Copyright (C) 2012-2014 Panasonic Corporation
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* Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <dm/device.h>
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#include <dm/platform_data/serial-uniphier.h>
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#include <serial.h>
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#define UART_REG(x) \
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u8 x; \
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u8 postpad_##x[3];
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/*
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* Note: Register map is slightly different from that of 16550.
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*/
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struct uniphier_serial {
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UART_REG(rbr); /* 0x00 */
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UART_REG(ier); /* 0x04 */
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UART_REG(iir); /* 0x08 */
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UART_REG(fcr); /* 0x0c */
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u8 mcr; /* 0x10 */
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u8 lcr;
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u16 __postpad;
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UART_REG(lsr); /* 0x14 */
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UART_REG(msr); /* 0x18 */
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u32 __none1;
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u32 __none2;
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u16 dlr;
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u16 __postpad2;
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};
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#define thr rbr
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/*
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* These are the definitions for the Line Control Register
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*/
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#define UART_LCR_WLS_8 0x03 /* 8 bit character length */
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/*
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* These are the definitions for the Line Status Register
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*/
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#define UART_LSR_DR 0x01 /* Data ready */
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#define UART_LSR_THRE 0x20 /* Xmit holding register empty */
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struct uniphier_serial_private_data {
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struct uniphier_serial __iomem *membase;
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};
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#define uniphier_serial_port(dev) \
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((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
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int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
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struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
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const unsigned int mode_x_div = 16;
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unsigned int divisor;
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writeb(UART_LCR_WLS_8, &port->lcr);
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divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
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writew(divisor, &port->dlr);
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return 0;
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}
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static int uniphier_serial_getc(struct udevice *dev)
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{
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struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
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if (!(readb(&port->lsr) & UART_LSR_DR))
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return -EAGAIN;
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return readb(&port->rbr);
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}
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static int uniphier_serial_putc(struct udevice *dev, const char c)
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{
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struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
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if (!(readb(&port->lsr) & UART_LSR_THRE))
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return -EAGAIN;
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writeb(c, &port->thr);
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return 0;
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}
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int uniphier_serial_probe(struct udevice *dev)
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{
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struct uniphier_serial_private_data *priv = dev_get_priv(dev);
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struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
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priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial));
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if (!priv->membase)
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return -ENOMEM;
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return 0;
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}
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int uniphier_serial_remove(struct udevice *dev)
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{
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unmap_sysmem(uniphier_serial_port(dev));
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return 0;
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}
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#ifdef CONFIG_OF_CONTROL
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static const struct udevice_id uniphier_uart_of_match = {
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{ .compatible = "panasonic,uniphier-uart"},
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{},
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};
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static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
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{
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/*
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* TODO: Masahiro Yamada (yamada.m@jp.panasonic.com)
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*
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* Implement conversion code from DTB to platform data
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* when supporting CONFIG_OF_CONTROL on UniPhir platform.
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*/
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}
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#endif
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static const struct dm_serial_ops uniphier_serial_ops = {
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.setbrg = uniphier_serial_setbrg,
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.getc = uniphier_serial_getc,
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.putc = uniphier_serial_putc,
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};
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U_BOOT_DRIVER(uniphier_serial) = {
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.name = DRIVER_NAME,
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.id = UCLASS_SERIAL,
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.of_match = of_match_ptr(uniphier_uart_of_match),
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.ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
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.probe = uniphier_serial_probe,
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.remove = uniphier_serial_remove,
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.priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
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.platdata_auto_alloc_size =
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sizeof(struct uniphier_serial_platform_data),
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.ops = &uniphier_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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