Simon Glass e761ecdbb8 x86: Add TSC timer ... This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>		2013-05-13 13:33:21 -07:00
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coreboot	x86: Add TSC timer	2013-05-13 13:33:21 -07:00
config.mk	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
cpu.c	x86: Rationalise kernel booting logic and bootstage	2013-05-13 13:33:20 -07:00
interrupts.c	x86: Declare global_data pointer when it is used	2013-05-13 13:33:20 -07:00
Makefile	x86: Rename CONFIG_NO_X86_RESET_VECTOR to CONFIG_X86_RESET_VECTOR	2013-02-14 20:18:58 -08:00
resetvec.S	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
start16.S	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
start.S	x86: Set up the global data pointer in C instead of asm	2013-02-01 15:36:53 -05:00
timer.c	x86: Add TSC timer	2013-05-13 13:33:21 -07:00
u-boot.lds	x86: Remove unused portion of link script	2013-05-13 13:31:18 -07:00