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https://github.com/brain-hackers/u-boot-brain
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e71de54a49
Add Intel Tangier SoC support. Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
21 lines
334 B
Plaintext
21 lines
334 B
Plaintext
#
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# Copyright (c) 2017 Intel Corporation
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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config INTEL_TANGIER
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bool
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depends on INTEL_MID
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config SYS_CAR_ADDR
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hex
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default 0x19200000
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config SYS_CAR_SIZE
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hex
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default 0x4000
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help
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Space in bytes in eSRAM used as Cache-As-RAM (CAR).
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Note this size must not exceed eSRAM's total size.
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