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https://github.com/brain-hackers/u-boot-brain
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e6b723fc70
We have a new board Peach-Pi similar to Peach-Pit. Peach-Pi differs from Peach-Pit in configuration factors like display resolution, memory size, SoC version etc. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
56 lines
1.3 KiB
Makefile
56 lines
1.3 KiB
Makefile
dtb-$(CONFIG_MACH_SUN7I) += sun7i-a20-pcduino3.dtb
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dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
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dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
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dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
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exynos4210-smdkv310.dtb \
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exynos4210-universal_c210.dtb \
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exynos4210-trats.dtb \
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exynos4412-trats2.dtb \
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exynos4412-odroid.dtb
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dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
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exynos5250-snow.dtb \
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exynos5250-smdk5250.dtb \
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exynos5420-smdk5420.dtb \
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exynos5420-peach-pit.dtb \
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exynos5800-peach-pi.dtb
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dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra20-medcom-wide.dtb \
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tegra20-paz00.dtb \
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tegra20-plutux.dtb \
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tegra20-seaboard.dtb \
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tegra20-tec.dtb \
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tegra20-trimslice.dtb \
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tegra20-ventana.dtb \
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tegra20-whistler.dtb \
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tegra20-colibri_t20_iris.dtb \
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tegra30-apalis.dtb \
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tegra30-beaver.dtb \
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tegra30-cardhu.dtb \
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tegra30-colibri.dtb \
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tegra30-tec-ng.dtb \
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tegra114-dalmore.dtb \
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tegra124-jetson-tk1.dtb \
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tegra124-venice2.dtb
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dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
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zynq-zc706.dtb \
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zynq-zed.dtb \
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zynq-zybo.dtb \
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zynq-microzed.dtb \
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zynq-zc770-xm010.dtb \
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zynq-zc770-xm012.dtb \
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zynq-zc770-xm013.dtb
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dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb
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dtb-$(CONFIG_SOCFPGA) += socfpga_cyclone5_socrates.dtb
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targets += $(dtb-y)
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DTC_FLAGS += -R 4 -p 0x1000
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PHONY += dtbs
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dtbs: $(addprefix $(obj)/, $(dtb-y))
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@:
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clean-files := *.dtb
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