mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-24 03:49:43 +09:00
e69e520f9d
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
119 lines
2.9 KiB
C
119 lines
2.9 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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* York Sun <yorksun@freescale.com>
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*
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* FSL DIU Framebuffer driver
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include "../../../../board/freescale/common/fsl_diu_fb.h"
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#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
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#include <stdio_dev.h>
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#include <video_fb.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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static int xres, yres;
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void diu_set_pixel_clock(unsigned int pixclock)
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{
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volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
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volatile clk512x_t *clk = &immap->clk;
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volatile unsigned int *clkdvdr = &clk->scfr[0];
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unsigned long speed_ccb, temp, pixval;
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speed_ccb = get_bus_freq(0) * 4;
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temp = 1000000000/pixclock;
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temp *= 1000;
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pixval = speed_ccb / temp;
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debug("DIU pixval = %lu\n", pixval);
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/* Modify PXCLK in GUTS CLKDVDR */
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debug("DIU: Current value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr));
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temp = in_be32(clkdvdr) & 0xFFFFFF00;
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out_be32(clkdvdr, temp | (pixval & 0xFF));
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debug("DIU: Modified value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr));
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}
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int mpc5121_diu_init(void)
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{
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unsigned int pixel_format;
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#if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES)
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xres = CONFIG_VIDEO_XRES;
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yres = CONFIG_VIDEO_YRES;
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#else
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xres = 1024;
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yres = 768;
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#endif
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pixel_format = 0x88883316;
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debug("mpc5121_diu_init\n");
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return fsl_diu_init(xres, pixel_format, 0);
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}
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#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
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/*
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* The Graphic Device
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*/
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GraphicDevice ctfb;
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void *video_hw_init(void)
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{
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GraphicDevice *pGD = (GraphicDevice *) &ctfb;
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struct fb_info *info;
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if (mpc5121_diu_init() < 0)
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return NULL;
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/* fill in Graphic device struct */
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sprintf(pGD->modeIdent, "%dx%dx%d %dkHz %dHz",
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xres, yres, 32, 64, 60);
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pGD->frameAdrs = (unsigned int)fsl_fb_open(&info);
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pGD->winSizeX = xres;
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pGD->winSizeY = yres;
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pGD->plnSizeX = pGD->winSizeX;
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pGD->plnSizeY = pGD->winSizeY;
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pGD->gdfBytesPP = 4;
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pGD->gdfIndex = GDF_32BIT_X888RGB;
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pGD->isaBase = 0;
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pGD->pciBase = 0;
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pGD->memSize = info->screen_size;
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/* Cursor Start Address */
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pGD->dprBase = 0;
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pGD->vprBase = 0;
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pGD->cprBase = 0;
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return (void *)pGD;
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}
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#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
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