mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 17:38:51 +09:00
![Peng Fan](/assets/img/avatar_default.png)
As what Linux Kernel 5.3.0 provides when enable/disable clk, there is an enable_count in clk_core_disable/enable. Introduce enable_count to track the clk enable/disable count when clk_enable/disable for CCF. And Initialize enable_count to 0 when register the clk. And clk tree dump with enable_count will be supported, it will be easy for us to check the clk status with enable_count Signed-off-by: Peng Fan <peng.fan@nxp.com>
50 lines
1.2 KiB
C
50 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <clk-uclass.h>
|
|
#include <dm.h>
|
|
#include <linux/clk-provider.h>
|
|
|
|
static ulong clk_fixed_rate_get_rate(struct clk *clk)
|
|
{
|
|
return to_clk_fixed_rate(clk->dev)->fixed_rate;
|
|
}
|
|
|
|
const struct clk_ops clk_fixed_rate_ops = {
|
|
.get_rate = clk_fixed_rate_get_rate,
|
|
};
|
|
|
|
static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
|
|
{
|
|
struct clk *clk = &to_clk_fixed_rate(dev)->clk;
|
|
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
|
|
to_clk_fixed_rate(dev)->fixed_rate =
|
|
dev_read_u32_default(dev, "clock-frequency", 0);
|
|
#endif
|
|
/* Make fixed rate clock accessible from higher level struct clk */
|
|
dev->uclass_priv = clk;
|
|
clk->dev = dev;
|
|
clk->enable_count = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct udevice_id clk_fixed_rate_match[] = {
|
|
{
|
|
.compatible = "fixed-clock",
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
U_BOOT_DRIVER(clk_fixed_rate) = {
|
|
.name = "fixed_rate_clock",
|
|
.id = UCLASS_CLK,
|
|
.of_match = clk_fixed_rate_match,
|
|
.ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
|
|
.platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
|
|
.ops = &clk_fixed_rate_ops,
|
|
};
|