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https://github.com/brain-hackers/u-boot-brain
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03578d940d
Enable DDR52 modes, since the SD core supports correct switching now. For completeness, list HS200 modes, however those were already enabled. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
39 lines
646 B
Plaintext
39 lines
646 B
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot for the ULCB board
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*
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include "r8a77950-ulcb.dts"
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#include "r8a77950-u-boot.dtsi"
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/ {
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cpld {
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compatible = "renesas,ulcb-cpld";
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status = "okay";
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gpio-sck = <&gpio6 8 0>;
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gpio-mosi = <&gpio6 7 0>;
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gpio-miso = <&gpio6 10 0>;
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gpio-sstbz = <&gpio2 3 0>;
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};
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr104;
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max-frequency = <208000000>;
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};
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&sdhi2 {
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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max-frequency = <200000000>;
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};
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&vcc_sdhi0 {
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u-boot,off-on-delay-us = <20000>;
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};
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