u-boot-brain/arch/mips/mach-mscc/lowlevel_init.S
Gregory CLEMENT 6bd8231a6d MSCC: add support for Luton SoCs
As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2018-12-19 15:23:01 +01:00

31 lines
521 B
ArmAsm

/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* Copyright (c) 2018 Microsemi Corporation
*/
#include <asm/asm.h>
#include <asm/regdef.h>
.set noreorder
.extern vcoreiii_tlb_init
#ifdef CONFIG_SOC_LUTON
.extern pll_init
#endif
LEAF(lowlevel_init)
/*
* As we have no stack yet, we can assume the restricted
* luxury of the sX-registers without saving them
*/
move s0,ra
jal vcoreiii_tlb_init
nop
#ifdef CONFIG_SOC_LUTON
jal pll_init
nop
#endif
jr s0
nop
END(lowlevel_init)