mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 11:16:15 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* MIPS Coherence Manager (CM) Register Definitions
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*
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* Copyright (c) 2016 Imagination Technologies Ltd.
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*/
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#ifndef __MIPS_ASM_CM_H__
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#define __MIPS_ASM_CM_H__
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/* Global Control Register (GCR) offsets */
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#define GCR_BASE 0x0008
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#define GCR_BASE_UPPER 0x000c
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#define GCR_REV 0x0030
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#define GCR_L2_CONFIG 0x0130
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#define GCR_L2_TAG_ADDR 0x0600
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#define GCR_L2_TAG_ADDR_UPPER 0x0604
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#define GCR_L2_TAG_STATE 0x0608
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#define GCR_L2_TAG_STATE_UPPER 0x060c
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#define GCR_L2_DATA 0x0610
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#define GCR_L2_DATA_UPPER 0x0614
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#define GCR_Cx_COHERENCE 0x2008
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/* GCR_REV CM versions */
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#define GCR_REV_CM3 0x0800
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/* GCR_L2_CONFIG fields */
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#define GCR_L2_CONFIG_ASSOC_SHIFT 0
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#define GCR_L2_CONFIG_ASSOC_BITS 8
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#define GCR_L2_CONFIG_LINESZ_SHIFT 8
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#define GCR_L2_CONFIG_LINESZ_BITS 4
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#define GCR_L2_CONFIG_SETSZ_SHIFT 12
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#define GCR_L2_CONFIG_SETSZ_BITS 4
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#define GCR_L2_CONFIG_BYPASS (1 << 20)
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/* GCR_Cx_COHERENCE */
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#define GCR_Cx_COHERENCE_DOM_EN (0xff << 0)
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#define GCR_Cx_COHERENCE_EN (0x1 << 0)
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#ifndef __ASSEMBLY__
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#include <asm/io.h>
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static inline void *mips_cm_base(void)
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{
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return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE);
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}
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static inline unsigned long mips_cm_l2_line_size(void)
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{
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unsigned long l2conf, line_sz;
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l2conf = __raw_readl(mips_cm_base() + GCR_L2_CONFIG);
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line_sz = l2conf >> GCR_L2_CONFIG_LINESZ_SHIFT;
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line_sz &= GENMASK(GCR_L2_CONFIG_LINESZ_BITS - 1, 0);
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return line_sz ? (2 << line_sz) : 0;
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}
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#endif /* !__ASSEMBLY__ */
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#endif /* __MIPS_ASM_CM_H__ */
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