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https://github.com/brain-hackers/u-boot-brain
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ee7b65f2cc
Add nodes for pcb090 and pcb091. There is currently no support in Linux for this SoC. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
109 lines
1.3 KiB
Plaintext
109 lines
1.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2018 Microsemi Corporation
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*/
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/dts-v1/;
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#include "mscc,luton.dtsi"
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/ {
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model = "Luton26 PCB090 Reference Board";
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compatible = "mscc,luton-pcb090", "mscc,luton";
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aliases {
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serial0 = &uart0;
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spi0 = &spi0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-leds {
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compatible = "gpio-leds";
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status_green {
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label = "pcb090:green:status";
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gpios = <&sgpio 64 GPIO_ACTIVE_HIGH>; /* p0.2 */
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default-state = "on";
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};
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status_red {
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label = "pcb090:red:status";
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gpios = <&sgpio 65 GPIO_ACTIVE_HIGH>; /* p1.2 */
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default-state = "off";
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};
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};
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};
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&sgpio {
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status = "okay";
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gpio-ranges = <&sgpio 0 0 96>;
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};
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&uart0 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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spi-flash@0 {
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compatible = "spi-flash";
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spi-max-frequency = <18000000>; /* input clock */
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reg = <0>; /* CS0 */
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spi-cs-high;
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};
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};
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&mdio0 {
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status = "okay";
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};
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&port0 {
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phy-handle = <&phy0>;
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};
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&port1 {
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phy-handle = <&phy1>;
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};
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&port2 {
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phy-handle = <&phy2>;
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};
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&port3 {
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phy-handle = <&phy3>;
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};
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&port4 {
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phy-handle = <&phy4>;
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};
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&port5 {
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phy-handle = <&phy5>;
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};
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&port6 {
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phy-handle = <&phy6>;
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};
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&port7 {
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phy-handle = <&phy7>;
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};
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&port8 {
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phy-handle = <&phy8>;
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};
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&port9 {
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phy-handle = <&phy9>;
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};
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&port10 {
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phy-handle = <&phy10>;
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};
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&port11 {
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phy-handle = <&phy11>;
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};
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