mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
2e2c2a5e72
Some instructions in the ARM ISA have multiple output registers, such as ldrd/ldp (load pair), where two registers are loaded from memory, but also ldr with indexing, where the memory base register is incremented as well when the value is loaded to the destination register. MMIO emulation under KVM is based on using the architecturally defined syndrome information that is provided when an exception is taken to the hypervisor. This syndrome information describes whether the instruction that triggered the exception is a load or a store, what the faulting address was, and which register was the destination register. This syndrome information can only describe one destination register, and when the trapping instruction is one with multiple outputs, KVM throws an error like kvm [615929]: Data abort outside memslots with no valid syndrome info on the host and kills the QEMU process with the following error: U-Boot 2020.07-rc3-00208-g88bd5b179360-dirty (Jun 06 2020 - 11:59:22 +0200) DRAM: 1 GiB Flash: error: kvm run failed Function not implemented R00=00000001 R01=00000040 R02=7ee0ce20 R03=00000000 R04=7ffd9eec R05=00000004 R06=7ffda3f8 R07=00000055 R08=7ffd9eec R09=7ef0ded0 R10=7ee0ce20 R11=00000000 R12=00000004 R13=7ee0cdf8 R14=00000000 R15=7ff72d08 PSR=200001d3 --C- A svc32 QEMU: Terminated This means that, in order to run U-Boot in QEMU under KVM, we need to avoid such instructions when accessing emulated devices. For the flash in particular, which is a hybrid between a ROM (backed by a read-only KVM memslot) when in array mode, and an emulated MMIO device (when in write mode), we need to take care to only use instructions that KVM can deal with when they trap. So override the flash read accessors that are used when running on QEMU under KVM. Note that the the 64-bit wide read and write accessors have been omitted: they are never used when running under QEMU given that it does not emulate CFI flash that supports it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2017 Tuomas Tynkkynen
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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/* Physical memory map */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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/* The DTB generated by QEMU is placed at start of RAM, stay away from there */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
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#define CONFIG_SYS_MALLOC_LEN SZ_16M
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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/* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
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#define CONFIG_SYS_HZ 1000
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/* Environment options */
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#define BOOT_TARGET_DEVICES(func) \
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func(USB, usb, 0) \
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func(SCSI, scsi, 0) \
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func(VIRTIO, virtio, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_addr=0x40000000\0" \
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"scriptaddr=0x40200000\0" \
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"pxefile_addr_r=0x40300000\0" \
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"kernel_addr_r=0x40400000\0" \
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"ramdisk_addr_r=0x44000000\0" \
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BOOTENV
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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#ifdef CONFIG_TFABOOT
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#define CONFIG_SYS_FLASH_BASE 0x4000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#else
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#define CONFIG_SYS_FLASH_BASE 0x0
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#define CONFIG_SYS_MAX_FLASH_BANKS 2
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#endif
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#define CONFIG_SYS_MAX_FLASH_SECT 256 /* Sector: 256K, Bank: 64M */
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#endif /* __CONFIG_H */
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