mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
7aeedac015
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not support 4 byte addressing opcodes, SFDP table parsing and different types of quad mode enable sequences. Many newer flashes no longer support BANK registers used by sf layer to a access >16MB of flash address space. So, sync SPI NOR framework from Linux v4.19 that supports all the above features. Start with basic sync up that brings in basic framework subsequent commits will bring in more features. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
33 lines
830 B
C
33 lines
830 B
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> et al.
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*
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*/
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#ifndef __MTD_CFI_H__
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#define __MTD_CFI_H__
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#define CFI_MFR_ANY 0xFFFF
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#define CFI_ID_ANY 0xFFFF
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#define CFI_MFR_CONTINUATION 0x007F
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#define CFI_MFR_AMD 0x0001
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#define CFI_MFR_AMIC 0x0037
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#define CFI_MFR_ATMEL 0x001F
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#define CFI_MFR_EON 0x001C
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#define CFI_MFR_FUJITSU 0x0004
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#define CFI_MFR_HYUNDAI 0x00AD
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#define CFI_MFR_INTEL 0x0089
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#define CFI_MFR_MACRONIX 0x00C2
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#define CFI_MFR_NEC 0x0010
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#define CFI_MFR_PMC 0x009D
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#define CFI_MFR_SAMSUNG 0x00EC
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#define CFI_MFR_SHARP 0x00B0
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#define CFI_MFR_SST 0x00BF
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#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
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#define CFI_MFR_MICRON 0x002C /* Micron */
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#define CFI_MFR_TOSHIBA 0x0098
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#define CFI_MFR_WINBOND 0x00DA
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#endif /* __MTD_CFI_H__ */
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