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https://github.com/brain-hackers/u-boot-brain
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![Patrick Delaunay](/assets/img/avatar_default.png)
Add support of RAM target in flashlayout to load kernel image ("system") and device tree ("filesystem") in DDR with DFU and start these images. The flashlayout.tsv is: - 0x01 fsbl Binary none 0x00000000 tf-a.stm32 - 0x03 ssbl Binary none 0x00000000 u-boot.stm32 P 0x10 kernel System ram0 0xC2000000 uImage.bin P 0x11 dtb FileSystem ram0 0xC4000000 dtb.bin Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
186 lines
4.4 KiB
C
186 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
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/*
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* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
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*/
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#ifndef _STM32PROG_H_
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#define _STM32PROG_H_
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/* - phase defines ------------------------------------------------*/
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#define PHASE_FLASHLAYOUT 0x00
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#define PHASE_FIRST_USER 0x10
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#define PHASE_LAST_USER 0xF0
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#define PHASE_CMD 0xF1
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#define PHASE_OTP 0xF2
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#define PHASE_PMIC 0xF4
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#define PHASE_END 0xFE
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#define PHASE_RESET 0xFF
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#define PHASE_DO_RESET 0x1FF
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#define DEFAULT_ADDRESS 0xFFFFFFFF
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#define OTP_SIZE 1024
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#define PMIC_SIZE 8
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enum stm32prog_target {
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STM32PROG_NONE,
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STM32PROG_MMC,
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STM32PROG_NAND,
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STM32PROG_NOR,
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STM32PROG_SPI_NAND,
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STM32PROG_RAM
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};
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enum stm32prog_link_t {
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LINK_SERIAL,
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LINK_USB,
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LINK_UNDEFINED,
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};
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struct image_header_s {
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bool present;
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u32 image_checksum;
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u32 image_length;
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};
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struct raw_header_s {
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u32 magic_number;
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u32 image_signature[64 / 4];
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u32 image_checksum;
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u32 header_version;
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u32 image_length;
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u32 image_entry_point;
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u32 reserved1;
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u32 load_address;
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u32 reserved2;
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u32 version_number;
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u32 option_flags;
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u32 ecdsa_algorithm;
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u32 ecdsa_public_key[64 / 4];
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u32 padding[83 / 4];
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u32 binary_type;
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};
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#define BL_HEADER_SIZE sizeof(struct raw_header_s)
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/* partition type in flashlayout file */
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enum stm32prog_part_type {
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PART_BINARY,
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PART_SYSTEM,
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PART_FILESYSTEM,
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RAW_IMAGE
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};
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/* device information */
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struct stm32prog_dev_t {
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enum stm32prog_target target;
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char dev_id;
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u32 erase_size;
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struct mmc *mmc;
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struct mtd_info *mtd;
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/* list of partition for this device / ordered in offset */
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struct list_head part_list;
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bool full_update;
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};
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/* partition information build from FlashLayout and device */
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struct stm32prog_part_t {
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/* FlashLayout information */
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int option;
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int id;
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enum stm32prog_part_type part_type;
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enum stm32prog_target target;
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char dev_id;
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/* partition name
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* (16 char in gpt, + 1 for null terminated string
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*/
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char name[16 + 1];
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u64 addr;
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u64 size;
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enum stm32prog_part_type bin_nb; /* SSBL repeatition */
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/* information on associated device */
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struct stm32prog_dev_t *dev; /* pointer to device */
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s16 part_id; /* partition id in device */
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int alt_id; /* alt id in usb/dfu */
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struct list_head list;
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};
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#define STM32PROG_MAX_DEV 5
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struct stm32prog_data {
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/* Layout information */
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int dev_nb; /* device number*/
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struct stm32prog_dev_t dev[STM32PROG_MAX_DEV]; /* array of device */
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int part_nb; /* nb of partition */
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struct stm32prog_part_t *part_array; /* array of partition */
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bool tee_detected;
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bool fsbl_nor_detected;
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/* command internal information */
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unsigned int phase;
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u32 offset;
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char error[255];
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struct stm32prog_part_t *cur_part;
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u32 *otp_part;
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u8 pmic_part[PMIC_SIZE];
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/* STM32 header information */
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struct raw_header_s *header_data;
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struct image_header_s header;
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/* SERIAL information */
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u32 cursor;
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u32 packet_number;
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u32 checksum;
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u8 *buffer; /* size = USART_RAM_BUFFER_SIZE*/
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int dfu_seq;
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u8 read_phase;
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/* bootm information */
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u32 uimage;
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u32 dtb;
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};
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extern struct stm32prog_data *stm32prog_data;
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/* OTP access */
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int stm32prog_otp_write(struct stm32prog_data *data, u32 offset,
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u8 *buffer, long *size);
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int stm32prog_otp_read(struct stm32prog_data *data, u32 offset,
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u8 *buffer, long *size);
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int stm32prog_otp_start(struct stm32prog_data *data);
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/* PMIC access */
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int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset,
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u8 *buffer, long *size);
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int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset,
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u8 *buffer, long *size);
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int stm32prog_pmic_start(struct stm32prog_data *data);
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/* generic part*/
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u8 stm32prog_header_check(struct raw_header_s *raw_header,
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struct image_header_s *header);
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int stm32prog_dfu_init(struct stm32prog_data *data);
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void stm32prog_next_phase(struct stm32prog_data *data);
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void stm32prog_do_reset(struct stm32prog_data *data);
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char *stm32prog_get_error(struct stm32prog_data *data);
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#define stm32prog_err(args...) {\
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if (data->phase != PHASE_RESET) { \
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sprintf(data->error, args); \
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data->phase = PHASE_RESET; \
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pr_err("Error: %s\n", data->error); } \
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}
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/* Main function */
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int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size);
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int stm32prog_serial_init(struct stm32prog_data *data, int link_dev);
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bool stm32prog_serial_loop(struct stm32prog_data *data);
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bool stm32prog_usb_loop(struct stm32prog_data *data, int dev);
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void stm32prog_clean(struct stm32prog_data *data);
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#endif
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