mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-02 08:13:44 +09:00
e519f03a18
There is no real need to exactly define space for saving patterns for alternate memory test. It is much easier to allocate space on the stack and use it instead of trying to find out space where pattern should be saved. For example if you want to test the whole DDR memory you can't save patter to DDR and you need to find it out. On Xilinx devices DDR or OCM addresses were chosen but that means that OCM needs to be mapped and U-Boot has access permission there. It is easier to remove this limitation and simply save it on stack because it is very clear that memory test can't rewrite U-Boot and U-Boot has also full access to memory where runs from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
100 lines
2.7 KiB
C
100 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) Stefano Babic <sbabic@denx.de>
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*
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* Configuration settings for the E+L i.MX6Q DO82 board.
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*/
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#ifndef __EL6Q_COMMON_CONFIG_H
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#define __EL6Q_COMMON_CONFIG_H
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#define CONFIG_BOARD_NAME EL6Q
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#include "mx6_common.h"
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#define CONFIG_IMX_THERMAL
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
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#define CONFIG_MXC_UART
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#ifdef CONFIG_SPL
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#include "imx6_spl.h"
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#endif
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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/* I2C config */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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/* Commands */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_BOARD_NAME EL6Q
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"board="__stringify(CONFIG_BOARD_NAME)"\0" \
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"cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
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"chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
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"console=" CONSOLE_DEV "\0" \
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"fdtfile=undefined\0" \
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"fdt_high=0xffffffff\0" \
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"fdt_addr_r=0x18000000\0" \
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"fdt_addr=0x18000000\0" \
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"findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
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"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
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"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) \
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func(PXE, PXE, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_ARP_TIMEOUT 200UL
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10800000
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/* Physical Memory Map */
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#define CONFIG_SYS_MMC_ENV_PART 2
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#endif
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#endif /* __EL6Q_COMMON_CONFIG_H */
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