mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 11:46:17 +09:00
7f1961018c
With driver model GPIOs must be requested before use. Make sure this is done correctly. (Note that the soft SPI part of universal is omitted, since this driver is about to be replaced with a driver-model-aware version) Signed-off-by: Simon Glass <sjg@chromium.org>
132 lines
2.4 KiB
C
132 lines
2.4 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <usb.h>
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#include <asm/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/dwmmc.h>
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#include <asm/arch/power.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_USB_EHCI_EXYNOS
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int board_usb_init(int index, enum usb_init_type init)
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{
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/* Configure gpios for usb 3503 hub:
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* disconnect, toggle reset and connect
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*/
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gpio_request(EXYNOS5_GPIO_D17, "usb_connect");
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gpio_request(EXYNOS5_GPIO_X35, "usb_reset");
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gpio_direction_output(EXYNOS5_GPIO_D17, 0);
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gpio_direction_output(EXYNOS5_GPIO_X35, 0);
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gpio_direction_output(EXYNOS5_GPIO_X35, 1);
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gpio_direction_output(EXYNOS5_GPIO_D17, 1);
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return 0;
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}
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#endif
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int board_init(void)
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{
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gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
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return 0;
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}
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int dram_init(void)
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{
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int i;
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u32 addr;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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}
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return 0;
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}
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int power_init_board(void)
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{
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set_ps_hold_ctrl();
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return 0;
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}
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void dram_init_banksize(void)
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{
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int i;
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u32 addr, size;
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
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size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
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gd->bd->bi_dram[i].start = addr;
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gd->bd->bi_dram[i].size = size;
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}
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}
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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int ret;
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/* dwmmc initializattion for available channels */
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ret = exynos_dwmmc_init(gd->fdt_blob);
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if (ret)
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debug("dwmmc init failed\n");
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return ret;
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}
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#endif
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static int board_uart_init(void)
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{
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int err = 0, uart_id;
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for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
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err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
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if (err) {
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debug("UART%d not configured\n",
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(uart_id - PERIPH_ID_UART0));
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return err;
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}
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}
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return err;
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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int err;
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err = board_uart_init();
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if (err) {
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debug("UART init failed\n");
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return err;
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}
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return err;
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}
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#endif
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#ifdef CONFIG_DISPLAY_BOARDINFO
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int checkboard(void)
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{
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printf("\nBoard: Arndale\n");
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return 0;
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}
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#endif
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#ifdef CONFIG_S5P_PA_SYSRAM
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void smp_set_core_boot_addr(unsigned long addr, int corenr)
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{
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writel(addr, CONFIG_S5P_PA_SYSRAM);
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/* make sure this write is really executed */
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__asm__ volatile ("dsb\n");
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}
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#endif
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