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https://github.com/brain-hackers/u-boot-brain
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1b9ed2574a
Some 86xx chips use CCB as the base clock for the I2C, and others used CCB/2. There is no pattern that can be used to determine which chips use which frequency, so the only way to determine is to look up the actual SOC designation and use the right value for that SOC. Signed-off-by: Timur Tabi <timur@freescale.com>
145 lines
3.3 KiB
C
145 lines
3.3 KiB
C
/*
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* Copyright 2004 Freescale Semiconductor.
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc86xx.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* used in some defintiions of CONFIG_SYS_CLK_FREQ */
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extern unsigned long get_board_sys_clk(unsigned long dummy);
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void get_sys_info(sys_info_t *sysInfo)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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uint plat_ratio, e600_ratio;
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio >>= 1;
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switch (plat_ratio) {
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case 0x0:
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sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
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break;
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case 0x02:
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case 0x03:
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case 0x04:
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case 0x05:
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case 0x06:
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case 0x08:
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case 0x09:
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case 0x0a:
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case 0x0c:
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case 0x10:
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sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
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break;
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default:
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sysInfo->freqSystemBus = 0;
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break;
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}
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e600_ratio = (gur->porpllsr) & 0x003f0000;
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e600_ratio >>= 16;
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switch (e600_ratio) {
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case 0x10:
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sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
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break;
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case 0x19:
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sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
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break;
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case 0x20:
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sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
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break;
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case 0x39:
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sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
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break;
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case 0x28:
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sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
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break;
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case 0x1d:
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sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
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break;
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default:
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sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
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break;
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}
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}
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/*
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* Measure CPU clock speed (core clock GCLK1, GCLK2)
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* (Approx. GCLK frequency in Hz)
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*/
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int get_clocks(void)
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{
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sys_info_t sys_info;
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get_sys_info(&sys_info);
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gd->cpu_clk = sys_info.freqProcessor;
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gd->bus_clk = sys_info.freqSystemBus;
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/*
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* The base clock for I2C depends on the actual SOC. Unfortunately,
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* there is no pattern that can be used to determine the frequency, so
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* the only choice is to look up the actual SOC number and use the value
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* for that SOC. This information is taken from application note
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* AN2919.
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*/
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#ifdef CONFIG_MPC8610
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gd->i2c1_clk = sys_info.freqSystemBus;
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#else
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gd->i2c1_clk = sys_info.freqSystemBus / 2;
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#endif
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gd->i2c2_clk = gd->i2c1_clk;
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if (gd->cpu_clk != 0)
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return 0;
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else
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return 1;
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}
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/*
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* get_bus_freq
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* Return system bus freq in Hz
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*/
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ulong get_bus_freq(ulong dummy)
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{
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ulong val;
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sys_info_t sys_info;
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get_sys_info(&sys_info);
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val = sys_info.freqSystemBus;
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return val;
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}
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