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https://github.com/brain-hackers/u-boot-brain
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![John Rigby](/assets/img/avatar_default.png)
This is an i.MX25 base board with only NAND so it uses nand_spl to boot. Signed-off-by: John Rigby <jcrigby@gmail.com> Tune configuration, add support for (redundant) environment in NAND. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> CC: Fred Fan <fanyefeng@gmail.com> CC: Tom <Tom.Rix@windriver.com>
177 lines
4.4 KiB
C
177 lines
4.4 KiB
C
/*
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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*
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* Based on imx27lite.c:
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* Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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* And:
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* RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx25-pinmux.h>
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static void mdelay(int n)
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{
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while (n-- > 0)
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udelay(1000);
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}
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FEC_MXC
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void tx25_fec_init(void)
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{
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struct iomuxc_mux_ctl *muxctl;
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struct iomuxc_pad_ctl *padctl;
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u32 val;
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u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
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struct gpio_regs *gpio4 = (struct gpio_regs *)IMX_GPIO4_BASE;
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struct gpio_regs *gpio3 = (struct gpio_regs *)IMX_GPIO3_BASE;
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u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
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debug("tx25_fec_init\n");
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/*
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* fec pin init is generic
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*/
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mx25_fec_init_pins();
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/*
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* Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
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*
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* FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
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* FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
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*/
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muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
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padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
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writel(gpio_mux_mode, &muxctl->pad_d13);
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writel(gpio_mux_mode, &muxctl->pad_d11);
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writel(0x0, &padctl->pad_d13);
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writel(0x0, &padctl->pad_d11);
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/* drop PHY power and assert reset (low) */
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val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9));
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writel(val, &gpio4->dr);
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val = readl(&gpio4->dir) | (1 << 7) | (1 << 9);
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writel(val, &gpio4->dir);
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mdelay(5);
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debug("resetting phy\n");
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/* turn on PHY power leaving reset asserted */
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val = readl(&gpio4->dr) | 1 << 9;
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writel(val, &gpio4->dr);
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mdelay(10);
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/*
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* Setup some strapping pins that are latched by the PHY
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* as reset goes high.
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*
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* Set PHY mode to 111
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* mode0 comes from FEC_RDATA0 which is GPIO 3_10 in mux mode 5
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* mode1 comes from FEC_RDATA1 which is GPIO 3_11 in mux mode 5
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* mode2 is tied high so nothing to do
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*
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* Turn on RMII mode
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* RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
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*/
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/*
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* save three current mux modes and set each to gpio mode
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*/
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saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
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saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
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saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
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writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
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/*
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* set each to 1 and make each an output
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*/
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val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->dr);
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val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->dir);
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mdelay(22); /* this value came from RedBoot */
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/*
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* deassert PHY reset
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*/
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val = readl(&gpio4->dr) | 1 << 7;
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writel(val, &gpio4->dr);
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writel(val, &gpio4->dr);
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mdelay(5);
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/*
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* set FEC pins back
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*/
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writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
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writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
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writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
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}
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#else
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#define tx25_fec_init()
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#endif
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int board_init()
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{
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#ifdef CONFIG_MXC_UART
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extern void mx25_uart_init_pins(void);
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mx25_uart_init_pins();
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#endif
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return 0;
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}
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int board_late_init(void)
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{
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tx25_fec_init();
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return 0;
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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#if CONFIG_NR_DRAM_BANKS > 1
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
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PHYS_SDRAM_2_SIZE);
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#endif
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return 0;
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}
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int checkboard(void)
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{
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printf("KARO TX25\n");
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return 0;
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}
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