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https://github.com/brain-hackers/u-boot-brain
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e4aafd5c20
Ethernet interfaces using serial protocols go through the serdes block integrated in the SoC. This is accessed over dedicated internal MDIOs which are part of the Ethernet PCI functions. Set up serdes at _start, along with other protocol specific port/MAC configuration. MDIO code is shared with enetc_mdio, read/write functions are exported from fsl_enetc_mdio for this reason. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
150 lines
3.7 KiB
C
150 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* ENETC ethernet controller driver
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* Copyright 2019 NXP
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <pci.h>
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#include <miiphy.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <miiphy.h>
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#include "fsl_enetc.h"
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static void enetc_mdio_wait_bsy(struct enetc_mdio_priv *priv)
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{
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while (enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_BSY)
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cpu_relax();
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}
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int enetc_mdio_read_priv(struct enetc_mdio_priv *priv, int addr, int devad,
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int reg)
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{
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if (devad == MDIO_DEVAD_NONE)
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enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
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else
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enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
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enetc_mdio_wait_bsy(priv);
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if (devad == MDIO_DEVAD_NONE) {
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enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ |
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(addr << 5) | reg);
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} else {
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enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
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enetc_mdio_wait_bsy(priv);
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enetc_write(priv, ENETC_MDIO_STAT, reg);
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enetc_mdio_wait_bsy(priv);
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enetc_write(priv, ENETC_MDIO_CTL, ENETC_MDIO_CTL_READ |
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(addr << 5) | devad);
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}
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enetc_mdio_wait_bsy(priv);
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if (enetc_read(priv, ENETC_MDIO_CFG) & ENETC_EMDIO_CFG_RD_ER)
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return ENETC_MDIO_READ_ERR;
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return enetc_read(priv, ENETC_MDIO_DATA);
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}
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int enetc_mdio_write_priv(struct enetc_mdio_priv *priv, int addr, int devad,
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int reg, u16 val)
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{
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if (devad == MDIO_DEVAD_NONE)
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enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C22);
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else
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enetc_write(priv, ENETC_MDIO_CFG, ENETC_EMDIO_CFG_C45);
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enetc_mdio_wait_bsy(priv);
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if (devad != MDIO_DEVAD_NONE) {
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enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + devad);
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enetc_write(priv, ENETC_MDIO_STAT, reg);
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} else {
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enetc_write(priv, ENETC_MDIO_CTL, (addr << 5) + reg);
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}
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enetc_mdio_wait_bsy(priv);
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enetc_write(priv, ENETC_MDIO_DATA, val);
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enetc_mdio_wait_bsy(priv);
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return 0;
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}
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/* DM wrappers */
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static int dm_enetc_mdio_read(struct udevice *dev, int addr, int devad, int reg)
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{
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struct enetc_mdio_priv *priv = dev_get_priv(dev);
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return enetc_mdio_read_priv(priv, addr, devad, reg);
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}
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static int dm_enetc_mdio_write(struct udevice *dev, int addr, int devad,
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int reg, u16 val)
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{
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struct enetc_mdio_priv *priv = dev_get_priv(dev);
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return enetc_mdio_write_priv(priv, addr, devad, reg, val);
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}
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static const struct mdio_ops enetc_mdio_ops = {
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.read = dm_enetc_mdio_read,
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.write = dm_enetc_mdio_write,
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};
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static int enetc_mdio_bind(struct udevice *dev)
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{
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char name[16];
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static int eth_num_devices;
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/*
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* prefer using PCI function numbers to number interfaces, but these
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* are only available if dts nodes are present. For PCI they are
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* optional, handle that case too. Just in case some nodes are present
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* and some are not, use different naming scheme - enetc-N based on
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* PCI function # and enetc#N based on interface count
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*/
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if (ofnode_valid(dev->node))
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sprintf(name, "emdio-%u", PCI_FUNC(pci_get_devfn(dev)));
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else
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sprintf(name, "emdio#%u", eth_num_devices++);
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device_set_name(dev, name);
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return 0;
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}
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static int enetc_mdio_probe(struct udevice *dev)
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{
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struct enetc_mdio_priv *priv = dev_get_priv(dev);
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priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0);
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if (!priv->regs_base) {
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enetc_dbg(dev, "failed to map BAR0\n");
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return -EINVAL;
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}
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priv->regs_base += ENETC_MDIO_BASE;
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dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY);
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return 0;
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}
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U_BOOT_DRIVER(enetc_mdio) = {
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.name = "enetc_mdio",
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.id = UCLASS_MDIO,
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.bind = enetc_mdio_bind,
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.probe = enetc_mdio_probe,
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.ops = &enetc_mdio_ops,
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.priv_auto_alloc_size = sizeof(struct enetc_mdio_priv),
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};
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static struct pci_device_id enetc_mdio_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_MDIO) },
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};
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U_BOOT_PCI_DEVICE(enetc_mdio, enetc_mdio_ids);
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