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https://github.com/brain-hackers/u-boot-brain
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026f30ec3e
PSCI can be used on both multiple and single core socs. Current implementation only allows PSCI to work on multiple core socs. This patch removes this restriction so that PSCI can work on single core socs as well. Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
34 lines
848 B
C
34 lines
848 B
C
/*
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* Copyright 2016 NXP Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/psci.h>
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#include <asm/system.h>
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#include <asm/armv8/sec_firmware.h>
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#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
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int psci_update_dt(void *fdt)
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{
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/*
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* If the PSCI in SEC Firmware didn't work, avoid to update the
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* device node of PSCI. But still return 0 instead of an error
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* number to support detecting PSCI dynamically and then switching
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* the SMP boot method between PSCI and spin-table.
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*/
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if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
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return 0;
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fdt_psci(fdt);
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#if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
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/* secure code lives in RAM, keep it alive */
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fdt_add_mem_rsv(fdt, (unsigned long)__secure_start,
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__secure_end - __secure_start);
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#endif
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return 0;
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}
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#endif
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