mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
6d8962e814
Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
275 lines
7.3 KiB
C
275 lines
7.3 KiB
C
/*
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* Balloon3 configuration file
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Board Configuration Options
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*/
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#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
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#define CONFIG_BALLOON3 1 /* Balloon3 board */
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/*
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* Environment settings
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*/
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_MALLOC_LEN (128*1024)
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_BOOTCOMMAND \
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"fpga load 0x0 0x50000 0x62638; " \
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"if usb reset && fatload usb 0 0xa4000000 uImage; then " \
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"bootm 0xa4000000; " \
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"fi; " \
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"bootm 0xd0000;"
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#define CONFIG_BOOTARGS "console=tty0 console=ttyS2,115200"
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#define CONFIG_TIMESTAMP
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#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SYS_TEXT_BASE 0x0
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#define CONFIG_LZMA /* LZMA compression support */
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/*
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* Serial Console Configuration
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*/
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#define CONFIG_PXA_SERIAL
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#define CONFIG_STUART 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* Bootloader Components Configuration
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_NFS
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#undef CONFIG_CMD_ENV
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_USB
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#define CONFIG_CMD_FPGA
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#undef CONFIG_LCD
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/*
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* KGDB
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*/
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#ifdef CONFIG_CMD_KGDB
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#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/*
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* HUSH Shell Configuration
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*/
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#define CONFIG_SYS_HUSH_PARSER 1
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_LONGHELP
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#ifdef CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT "$ "
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#else
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#define CONFIG_SYS_PROMPT "=> "
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#endif
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_DEVICE_NULLDEV 1
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/*
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* Clock Configuration
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*/
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#undef CONFIG_SYS_CLKS_IN_HZ
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#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
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#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
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/*
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* Stack sizes
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*/
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#define CONFIG_STACKSIZE (128*1024) /* regular stack */
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#ifdef CONFIG_USE_IRQ
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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#endif
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/*
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* DRAM Map
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*/
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#define CONFIG_NR_DRAM_BANKS 3 /* 2 banks of DRAM */
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#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
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#define PHYS_SDRAM_2 0xb0000000 /* SDRAM Bank #2 */
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#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
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#define PHYS_SDRAM_3 0x80000000 /* SDRAM Bank #2 */
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#define PHYS_SDRAM_3_SIZE 0x08000000 /* 128 MB */
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#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
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#define CONFIG_SYS_DRAM_SIZE 0x18000000 /* 384 MB DRAM */
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#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0xa1000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR \
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(PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
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/*
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* NOR FLASH
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*/
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#ifdef CONFIG_CMD_FLASH
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_ENV_IS_IN_FLASH
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#else
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_ENV_IS_NOWHERE
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#endif
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#define CONFIG_SYS_MONITOR_BASE 0x000000
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#define CONFIG_SYS_MONITOR_LEN 0x40000
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_ENV_ADDR 0x40000
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#define CONFIG_ENV_SECT_SIZE 0x10000
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/*
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* GPIO settings
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*/
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#define CONFIG_SYS_GPSR0_VAL 0x307dc7fd
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#define CONFIG_SYS_GPSR1_VAL 0x03cffa4e
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#define CONFIG_SYS_GPSR2_VAL 0x7131c000
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#define CONFIG_SYS_GPSR3_VAL 0x01e1f3ff
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#define CONFIG_SYS_GPCR0_VAL 0x0
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#define CONFIG_SYS_GPCR1_VAL 0x0
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#define CONFIG_SYS_GPCR2_VAL 0x0
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#define CONFIG_SYS_GPCR3_VAL 0x0
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#define CONFIG_SYS_GPDR0_VAL 0xc0f98e02
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#define CONFIG_SYS_GPDR1_VAL 0xfcffa8b7
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#define CONFIG_SYS_GPDR2_VAL 0x22e3ffff
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#define CONFIG_SYS_GPDR3_VAL 0x000201fe
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#define CONFIG_SYS_GAFR0_L_VAL 0x96c00000
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#define CONFIG_SYS_GAFR0_U_VAL 0xa5e5459b
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#define CONFIG_SYS_GAFR1_L_VAL 0x699b759a
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#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a5aa
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#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
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#define CONFIG_SYS_GAFR2_U_VAL 0x01f9a6aa
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#define CONFIG_SYS_GAFR3_L_VAL 0x54510003
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#define CONFIG_SYS_GAFR3_U_VAL 0x00001599
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#define CONFIG_SYS_PSSR_VAL 0x30
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/*
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* Clock settings
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*/
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#define CONFIG_SYS_CKEN 0xffffffff
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#define CONFIG_SYS_CCCR 0x00000290
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/*
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* Memory settings
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*/
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#define CONFIG_SYS_MSC0_VAL 0x7ff07ff8
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#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
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#define CONFIG_SYS_MSC2_VAL 0x74a42491
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#define CONFIG_SYS_MDCNFG_VAL 0x89d309d3
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#define CONFIG_SYS_MDREFR_VAL 0x001d8018
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#define CONFIG_SYS_MDMRS_VAL 0x00220022
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#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
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#define CONFIG_SYS_SXCNFG_VAL 0x00000000
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#define CONFIG_SYS_MEM_BUF_IMP 0x0f
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/*
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* PCMCIA and CF Interfaces
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*/
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#define CONFIG_SYS_MECR_VAL 0x00000000
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#define CONFIG_SYS_MCMEM0_VAL 0x00014307
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#define CONFIG_SYS_MCMEM1_VAL 0x00014307
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#define CONFIG_SYS_MCATT0_VAL 0x0001c787
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#define CONFIG_SYS_MCATT1_VAL 0x0001c787
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#define CONFIG_SYS_MCIO0_VAL 0x0001430f
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#define CONFIG_SYS_MCIO1_VAL 0x0001430f
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/*
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* LCD
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*/
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#ifdef CONFIG_LCD
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#define CONFIG_BALLOON3LCD
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_CMD_BMP
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
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#endif
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_BOARD_INIT
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "balloon3"
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#endif
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/*
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* FPGA
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*/
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#ifdef CONFIG_CMD_FPGA
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#define CONFIG_FPGA
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#define CONFIG_FPGA_XILINX
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#define CONFIG_FPGA_SPARTAN3
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#define CONFIG_SYS_FPGA_PROG_FEEDBACK
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#define CONFIG_SYS_FPGA_WAIT 1000
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#define CONFIG_MAX_FPGA_DEVICES 1
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#endif
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#endif /* __CONFIG_H */
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