mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
99744b7e34
This is an sh2a device (max 266MHz) with FPU, video display controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports, SD and on-chip USB. The RSK2+SH7269 board uses the SH7269 processor. It is often referred to as just rsk7269. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
77 lines
2.3 KiB
C
77 lines
2.3 KiB
C
/*
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* Configuation settings for the Renesas RSK2+SH7269 board
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*
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* Copyright (C) 2012 Renesas Electronics Europe Ltd.
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* Copyright (C) 2012 Phil Edworthy
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*
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* This file is released under the terms of GPL v2 and any later version.
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* See the file COPYING in the root directory of the source tree for details.
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*/
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#ifndef __RSK7269_H
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#define __RSK7269_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH2 1
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#define CONFIG_SH2A 1
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#define CONFIG_CPU_SH7269 1
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#define CONFIG_RSK7269 1
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#ifndef _CONFIG_CMD_DEFAULT_H
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# include <config_cmd_default.h>
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTARGS "console=ttySC7,115200"
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */
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#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Serial */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF7
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/* Memory */
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/* u-boot relocated to top 256KB of ram */
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#define CONFIG_SYS_TEXT_BASE 0x0DFC0000
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#define CONFIG_SYS_SDRAM_BASE 0x0C000000
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#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
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#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024)
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/* NOR Flash */
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_OFFSET (128 * 1024)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 66125000
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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/* Network interface */
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#define CONFIG_SMC911X
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#define CONFIG_SMC911X_16_BIT
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#define CONFIG_SMC911X_BASE 0x24000000
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#endif /* __RSK7269_H */
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