mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
07a8060a12
Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both fdt_high and initrd_high. This change implies that the FDT and initrd will always be copied into the first 256 MiB of RAM instead of being used in place, which can cause various kinds of inobvious problems. The simpler problems include FDT or initrd being overwritten or being used from unaligned addresses, especially on ARM64. The overhead of copying the FDT to aligned location is negligible and these problems go away, so the benefit is significant. Regarding alignment problems with fitImage. The alignment of DT properties is always 32 bits, which implies that the alignment of the "data" property in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The kernel expects all elements, including DT and initrd, to be aligned to 64 bits on ARM64, thus using them in place may not be possible. Using the bootm_size assures correct alignment, again with negligible overhead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/configs/koelsch.h
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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*/
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#ifndef __KOELSCH_H
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#define __KOELSCH_H
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#include "rcar-gen2-common.h"
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#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
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#define STACK_AREA_SIZE 0x00100000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define RCAR_GEN2_SDRAM_BASE 0x40000000
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#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
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#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x1
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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#define RMOBILE_XTAL_CLK 20000000u
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#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootm_size=0x10000000\0"
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/* SPL support */
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#define CONFIG_SPL_TEXT_BASE 0xe6300000
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#define CONFIG_SPL_STACK 0xe6340000
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#define CONFIG_SPL_MAX_SIZE 0x4000
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_CONS_SCIF0
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#define CONFIG_SH_SCIF_CLK_FREQ 65000000
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#endif
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#endif /* __KOELSCH_H */
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