u-boot-brain/arch/arm/include/asm/arch-lpc32xx/wdt.h
Tom Rini 83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00

38 lines
1.1 KiB
C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
*/
#ifndef _LPC32XX_WDT_H
#define _LPC32XX_WDT_H
#include <asm/types.h>
/* Watchdog Timer Registers */
struct wdt_regs {
u32 isr; /* Interrupt Status Register */
u32 ctrl; /* Control Register */
u32 counter; /* Counter Value Register */
u32 mctrl; /* Match Control Register */
u32 match0; /* Match 0 Register */
u32 emr; /* External Match Control Register */
u32 pulse; /* Reset Pulse Length Register */
u32 res; /* Reset Source Register */
};
/* Watchdog Timer Control Register bits */
#define WDTIM_CTRL_PAUSE_EN (1 << 2)
#define WDTIM_CTRL_RESET_COUNT (1 << 1)
#define WDTIM_CTRL_COUNT_ENAB (1 << 0)
/* Watchdog Timer Match Control Register bits */
#define WDTIM_MCTRL_RESFRC2 (1 << 6)
#define WDTIM_MCTRL_RESFRC1 (1 << 5)
#define WDTIM_MCTRL_M_RES2 (1 << 4)
#define WDTIM_MCTRL_M_RES1 (1 << 3)
#define WDTIM_MCTRL_STOP_COUNT0 (1 << 2)
#define WDTIM_MCTRL_RESET_COUNT0 (1 << 1)
#define WDTIM_MCTRL_MR0_INT (1 << 0)
#endif /* _LPC32XX_WDT_H */