mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 00:48:52 +09:00
![Stephen Warren](/assets/img/avatar_default.png)
Some boards have a different set of USB controllers enabled in DT than the set referenced by /alias entries. This patch fixes that. For example, this avoids the following message while booting on Ventana, which is caused by the fact that the USB0 controller had no alias, and defaulted to wanting a sequence number of 0, which was later explicitly requested by the alias for USB controller 2. USB2: Device 'usb@c5008000': seq 0 is in use by 'usb@c5000000' This didn't affect USB operation in any way though. Related, there's no need for the USB controller aliases to have an order that's different from the HW order, so re-order any aliases to match the HW ordering. This has the benefit that since USB controller 0 is the only one that supports device-mode in HW, and U-Boot only supports enabling device move on controller 0, there's now good synergy in the ordering! For Tegra20, that's not relevant at present since USB device mode doesn't work correctly on that SoC, but it will save some head-scratching later. This patch doesn't fix the colibri_t20 board, even though it has the same issue, since Marcel already sent a patch for that. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Harmony and Ventana
132 lines
2.5 KiB
Plaintext
132 lines
2.5 KiB
Plaintext
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "Compulab TrimSlice board";
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compatible = "compulab,trimslice", "nvidia,tegra20";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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usb0 = "/usb@c5000000";
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mmc0 = "/sdhci@c8000600";
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mmc1 = "/sdhci@c8000000";
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spi0 = "/spi@7000c380";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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serial@70006000 {
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clock-frequency = <216000000>;
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};
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spi@7000c380 {
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status = "okay";
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spi-max-frequency = <25000000>;
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};
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pcie-controller@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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avdd-plle-supply = <&pci_vdd_reg>;
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vddio-pex-clk-supply = <&pci_clk_reg>;
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pci@1,0 {
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status = "okay";
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};
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};
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usb@c5000000 {
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status = "okay";
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nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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};
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sdhci@c8000000 {
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status = "okay";
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bus-width = <4>;
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};
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sdhci@c8000600 {
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status = "okay";
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cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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clk32k_in: clock@0 {
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compatible = "fixed-clock";
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reg=<0>;
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_vdd_reg: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "avdd_hdmi";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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hdmi_pll_reg: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "avdd_hdmi_pll";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vbus_reg: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usb1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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};
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pci_clk_reg: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "pci_clk";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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pci_vdd_reg: regulator@4 {
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compatible = "regulator-fixed";
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reg = <4>;
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regulator-name = "pci_vdd";
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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regulator-always-on;
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};
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};
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};
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