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https://github.com/brain-hackers/u-boot-brain
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e32028a70b
Add initial support for Compulab CM-FX6 CoM. Support includes MMC, SPI flash, and SPL with dynamic DRAM detection. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
112 lines
2.2 KiB
C
112 lines
2.2 KiB
C
/*
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* Board functions for Compulab CM-FX6 board
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*
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* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
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*
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* Author: Nikita Kiryanov <nikita@compulab.co.il>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <fsl_esdhc.h>
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#include <asm/arch/sys_proto.h>
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#include "common.h"
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_FSL_ESDHC
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static struct fsl_esdhc_cfg usdhc_cfg[3] = {
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{USDHC1_BASE_ADDR},
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{USDHC2_BASE_ADDR},
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{USDHC3_BASE_ADDR},
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};
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static enum mxc_clock usdhc_clk[3] = {
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MXC_ESDHC_CLK,
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MXC_ESDHC2_CLK,
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MXC_ESDHC3_CLK,
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};
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int board_mmc_init(bd_t *bis)
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{
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int i;
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cm_fx6_set_usdhc_iomux();
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for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
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usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
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usdhc_cfg[i].max_bus_width = 4;
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fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
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enable_usdhc_clk(1, i);
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}
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return 0;
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}
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#endif
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: CM-FX6\n");
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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switch (gd->ram_size) {
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case 0x10000000: /* DDR_16BIT_256MB */
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gd->bd->bi_dram[0].size = 0x10000000;
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gd->bd->bi_dram[1].size = 0;
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break;
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case 0x20000000: /* DDR_32BIT_512MB */
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gd->bd->bi_dram[0].size = 0x20000000;
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gd->bd->bi_dram[1].size = 0;
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break;
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case 0x40000000:
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if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
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gd->bd->bi_dram[0].size = 0x20000000;
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gd->bd->bi_dram[1].size = 0x20000000;
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} else { /* DDR_64BIT_1GB */
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gd->bd->bi_dram[0].size = 0x40000000;
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gd->bd->bi_dram[1].size = 0;
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}
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break;
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case 0x80000000: /* DDR_64BIT_2GB */
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gd->bd->bi_dram[0].size = 0x40000000;
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gd->bd->bi_dram[1].size = 0x40000000;
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break;
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case 0xEFF00000: /* DDR_64BIT_4GB */
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gd->bd->bi_dram[0].size = 0x70000000;
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gd->bd->bi_dram[1].size = 0x7FF00000;
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break;
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}
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}
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int dram_init(void)
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{
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gd->ram_size = imx_ddr_size();
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switch (gd->ram_size) {
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case 0x10000000:
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case 0x20000000:
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case 0x40000000:
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case 0x80000000:
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break;
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case 0xF0000000:
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gd->ram_size -= 0x100000;
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break;
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default:
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printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
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return -1;
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}
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return 0;
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}
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