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![Wolfgang Denk](/assets/img/avatar_default.png)
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
/*
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* (C) Copyright 2001
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* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include "ocrtc.h"
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#include <asm/processor.h>
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#include <i2c.h>
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#include <command.h>
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extern void lxt971_no_sleep(void);
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int board_early_init_f (void)
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{
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/*
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* IRQ 0-15 405GP internally generated; active high; level sensitive
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* IRQ 16 405GP internally generated; active low; level sensitive
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* IRQ 17-24 RESERVED
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* IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
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* IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
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* IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
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* IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
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* IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
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* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
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* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
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*/
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mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
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mtdcr (UIC0ER, 0x00000000); /* disable all ints */
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mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
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mtdcr (UIC0PR, 0xFFFFFF81); /* set int polarities */
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mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
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mtdcr (UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
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mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
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/*
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* EBC Configuration Register: clear EBTC -> high-Z ebc signals between
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* transfers, set device-paced timeout to 256 cycles
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*/
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mtebc (EBC0_CFG, 0x20400000);
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return 0;
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}
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/*
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* Check Board Identity:
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*/
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int checkboard (void)
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{
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char str[64];
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int i = getenv_f("serial#", str, sizeof (str));
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puts ("Board: ");
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if (i == -1) {
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#ifdef CONFIG_OCRTC
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puts ("### No HW ID - assuming OCRTC");
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#endif
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#ifdef CONFIG_ORSG
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puts ("### No HW ID - assuming ORSG");
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#endif
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} else {
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puts (str);
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}
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putc ('\n');
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/*
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* Disable sleep mode in LXT971
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*/
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lxt971_no_sleep();
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return (0);
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}
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