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https://github.com/brain-hackers/u-boot-brain
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a71e907c4d
The Arm Versatile Express and Juno development boards contain an OSC clock generator that can be accessed through the Versatile Express config bus. The generators are quite often being controlled by some MCU and the config bus offers a uniform way of exposing them. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
110 lines
2.4 KiB
C
110 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Arm Ltd
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* Author: Liviu Dudau <liviu.dudau@foss.arm.com>
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*
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*/
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#define DEBUG
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <dm/lists.h>
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#include <errno.h>
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#include <misc.h>
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#define CLK_FUNCTION BIT(20)
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struct vexpress_osc_clk_priv {
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u8 osc;
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ulong rate_min;
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ulong rate_max;
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};
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static ulong vexpress_osc_clk_get_rate(struct clk *clk)
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{
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int err;
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u32 data;
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struct udevice *vexpress_cfg = dev_get_parent(clk->dev);
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struct vexpress_osc_clk_priv *priv = dev_get_priv(clk->dev);
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data = CLK_FUNCTION | priv->osc;
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err = misc_read(vexpress_cfg, 0, &data, sizeof(data));
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if (err)
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return err;
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return data;
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}
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#ifndef CONFIG_SPL_BUILD
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static ulong vexpress_osc_clk_set_rate(struct clk *clk, ulong rate)
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{
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int err;
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u32 buffer[2];
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struct udevice *vexpress_cfg = dev_get_parent(clk->dev);
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struct vexpress_osc_clk_priv *priv = dev_get_priv(clk->dev);
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if (rate < priv->rate_min || rate > priv->rate_max)
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return -EINVAL;
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/*
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* we are sending the parent the info about the oscillator
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* and the value we want to set
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*/
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buffer[0] = CLK_FUNCTION | priv->osc;
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buffer[1] = rate;
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err = misc_write(vexpress_cfg, 0, buffer, 2 * sizeof(u32));
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if (err)
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return err;
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return rate;
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}
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#endif
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static struct clk_ops vexpress_osc_clk_ops = {
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.get_rate = vexpress_osc_clk_get_rate,
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#ifndef CONFIG_SPL_BUILD
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.set_rate = vexpress_osc_clk_set_rate,
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#endif
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};
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static int vexpress_osc_clk_probe(struct udevice *dev)
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{
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struct vexpress_osc_clk_priv *priv = dev_get_priv(dev);
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u32 values[2];
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int err;
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err = dev_read_u32_array(dev, "freq-range", values, 2);
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if (err)
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return err;
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priv->rate_min = values[0];
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priv->rate_max = values[1];
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err = dev_read_u32_array(dev, "arm,vexpress-sysreg,func", values, 2);
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if (err)
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return err;
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if (values[0] != 1) {
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dev_err(dev, "Invalid VExpress function for clock, must be '1'");
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return -EINVAL;
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}
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priv->osc = values[1];
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debug("clk \"%s%d\", min freq %luHz, max freq %luHz\n", dev->name,
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priv->osc, priv->rate_min, priv->rate_max);
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return 0;
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}
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static const struct udevice_id vexpress_osc_clk_ids[] = {
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{ .compatible = "arm,vexpress-osc", },
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{}
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};
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U_BOOT_DRIVER(vexpress_osc_clk) = {
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.name = "vexpress_osc_clk",
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.id = UCLASS_CLK,
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.of_match = vexpress_osc_clk_ids,
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.ops = &vexpress_osc_clk_ops,
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.priv_auto_alloc_size = sizeof(struct vexpress_osc_clk_priv),
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.probe = vexpress_osc_clk_probe,
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};
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