mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-30 16:40:44 +09:00
e174bd74c9
Malta boards may be used with cores which support L2 caches, however U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll disable L2 caches by setting the L2B bit in Config2. This is specific to MTI/Imagination MIPS cores which is why this is done for the Malta board rather than generically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> |
||
|---|---|---|
| .. | ||
| lowlevel_init.S | ||
| Makefile | ||
| malta.c | ||
| superio.c | ||
| superio.h | ||