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https://github.com/brain-hackers/u-boot-brain
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b4806d6f1f
The previous setjmp-implementation (as a static inline function that contained an 'asm volatile' sequence) was extremely fragile: (some versions of) GCC optimised the set of registers. One critical example was the removal of 'r9' from the clobber list, if -ffixed-reg9 was supplied. To increase robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
43 lines
874 B
ArmAsm
43 lines
874 B
ArmAsm
/*
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* (C) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/macro.h>
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#include <linux/linkage.h>
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.pushsection .text.setjmp, "ax"
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ENTRY(setjmp)
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/* Preserve all callee-saved registers and the SP */
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stp x19, x20, [x0,#0]
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stp x21, x22, [x0,#16]
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stp x23, x24, [x0,#32]
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stp x25, x26, [x0,#48]
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stp x27, x28, [x0,#64]
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stp x29, x30, [x0,#80]
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mov x2, sp
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str x2, [x0, #96]
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mov x0, #0
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ret
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ENDPROC(setjmp)
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.popsection
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.pushsection .text.longjmp, "ax"
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ENTRY(longjmp)
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ldp x19, x20, [x0,#0]
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ldp x21, x22, [x0,#16]
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ldp x23, x24, [x0,#32]
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ldp x25, x26, [x0,#48]
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ldp x27, x28, [x0,#64]
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ldp x29, x30, [x0,#80]
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ldr x2, [x0,#96]
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mov sp, x2
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/* Move the return value in place, but return 1 if passed 0. */
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adds x0, xzr, x1
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csinc x0, x0, xzr, ne
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ret
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ENDPROC(longjmp)
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.popsection
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