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https://github.com/brain-hackers/u-boot-brain
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b4806d6f1f
The previous setjmp-implementation (as a static inline function that contained an 'asm volatile' sequence) was extremely fragile: (some versions of) GCC optimised the set of registers. One critical example was the removal of 'r9' from the clobber list, if -ffixed-reg9 was supplied. To increase robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
38 lines
730 B
ArmAsm
38 lines
730 B
ArmAsm
/*
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* (C) 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <asm/assembler.h>
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#include <linux/linkage.h>
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.pushsection .text.setjmp, "ax"
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ENTRY(setjmp)
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/*
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* A subroutine must preserve the contents of the registers
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* r4-r8, r10, r11 (v1-v5, v7 and v8) and SP (and r9 in PCS
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* variants that designate r9 as v6).
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*/
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mov ip, sp
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stm a1, {v1-v8, ip, lr}
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mov a1, #0
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bx lr
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ENDPROC(setjmp)
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.popsection
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.pushsection .text.longjmp, "ax"
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ENTRY(longjmp)
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ldm a1, {v1-v8, ip, lr}
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mov sp, ip
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mov a1, a2
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/* If we were passed a return value of zero, return one instead */
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cmp a1, #0
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bne 1f
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mov a1, #1
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1:
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bx lr
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ENDPROC(longjmp)
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.popsection
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