mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-17 07:28:51 +09:00
220 lines
6.4 KiB
C
220 lines
6.4 KiB
C
/*
|
|
* (C) Copyright 2007-2008
|
|
* Stelian Pop <stelian.pop@leadtechdesign.com>
|
|
* Lead Tech Design <www.leadtechdesign.com>
|
|
*
|
|
* Configuation settings for the AT91CAP9ADK board.
|
|
*
|
|
* See file CREDITS for list of people who contributed to this
|
|
* project.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*/
|
|
|
|
#ifndef __CONFIG_H
|
|
#define __CONFIG_H
|
|
|
|
/* ARM asynchronous clock */
|
|
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
|
#define CONFIG_SYS_HZ 1000
|
|
|
|
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
|
#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
|
|
#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
|
|
#define CONFIG_ARCH_CPU_INIT
|
|
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
|
|
|
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
|
#define CONFIG_SETUP_MEMORY_TAGS 1
|
|
#define CONFIG_INITRD_TAG 1
|
|
|
|
#define CONFIG_SKIP_LOWLEVEL_INIT
|
|
#define CONFIG_SKIP_RELOCATE_UBOOT
|
|
|
|
/*
|
|
* Hardware drivers
|
|
*/
|
|
#define CONFIG_ATMEL_USART 1
|
|
#undef CONFIG_USART0
|
|
#undef CONFIG_USART1
|
|
#undef CONFIG_USART2
|
|
#define CONFIG_USART3 1 /* USART 3 is DBGU */
|
|
|
|
/* LCD */
|
|
#define CONFIG_LCD 1
|
|
#define LCD_BPP LCD_COLOR8
|
|
#define CONFIG_LCD_LOGO 1
|
|
#undef LCD_TEST_PATTERN
|
|
#define CONFIG_LCD_INFO 1
|
|
#define CONFIG_LCD_INFO_BELOW_LOGO 1
|
|
#define CONFIG_SYS_WHITE_ON_BLACK 1
|
|
#define CONFIG_ATMEL_LCD 1
|
|
#define CONFIG_ATMEL_LCD_BGR555 1
|
|
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
|
|
|
|
/* LED */
|
|
#define CONFIG_AT91_LED
|
|
#define CONFIG_RED_LED AT91_PIN_PC29 /* this is the power led */
|
|
#define CONFIG_GREEN_LED AT91_PIN_PA10 /* this is the user1 led */
|
|
#define CONFIG_YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */
|
|
|
|
#define CONFIG_BOOTDELAY 3
|
|
|
|
/*
|
|
* BOOTP options
|
|
*/
|
|
#define CONFIG_BOOTP_BOOTFILESIZE 1
|
|
#define CONFIG_BOOTP_BOOTPATH 1
|
|
#define CONFIG_BOOTP_GATEWAY 1
|
|
#define CONFIG_BOOTP_HOSTNAME 1
|
|
|
|
/*
|
|
* Command line configuration.
|
|
*/
|
|
#include <config_cmd_default.h>
|
|
#undef CONFIG_CMD_BDI
|
|
#undef CONFIG_CMD_FPGA
|
|
#undef CONFIG_CMD_IMI
|
|
#undef CONFIG_CMD_LOADS
|
|
#undef CONFIG_CMD_SOURCE
|
|
|
|
#define CONFIG_CMD_PING 1
|
|
#define CONFIG_CMD_DHCP 1
|
|
#define CONFIG_CMD_NAND 1
|
|
#define CONFIG_CMD_USB 1
|
|
|
|
/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
|
|
#define CONFIG_NR_DRAM_BANKS 1
|
|
#define PHYS_SDRAM 0x70000000
|
|
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
|
|
|
|
/* DataFlash */
|
|
#define CONFIG_ATMEL_DATAFLASH_SPI
|
|
#define CONFIG_HAS_DATAFLASH 1
|
|
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
|
|
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
|
|
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
|
|
#define AT91_SPI_CLK 15000000
|
|
#define DATAFLASH_TCSS (0x1a << 16)
|
|
#define DATAFLASH_TCHS (0x1 << 24)
|
|
|
|
/* NOR flash */
|
|
#define CONFIG_SYS_FLASH_CFI 1
|
|
#define CONFIG_FLASH_CFI_DRIVER 1
|
|
#define PHYS_FLASH_1 0x10000000
|
|
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
|
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
|
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
|
/* our ALE is AD21 */
|
|
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
|
/* our CLE is AD22 */
|
|
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
|
|
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
|
|
|
|
/* NAND flash */
|
|
#ifdef CONFIG_CMD_NAND
|
|
#define CONFIG_NAND_ATMEL
|
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
|
#define CONFIG_SYS_NAND_BASE 0x40000000
|
|
#define CONFIG_SYS_NAND_DBW_8 1
|
|
#endif
|
|
|
|
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
|
|
#endif
|
|
|
|
/* Ethernet */
|
|
#define CONFIG_MACB 1
|
|
#define CONFIG_RMII 1
|
|
#define CONFIG_NET_MULTI 1
|
|
#define CONFIG_NET_RETRY_COUNT 20
|
|
#define CONFIG_RESET_PHY_R 1
|
|
|
|
/* USB */
|
|
#define CONFIG_USB_ATMEL
|
|
#define CONFIG_USB_OHCI_NEW 1
|
|
#define CONFIG_DOS_PARTITION 1
|
|
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
|
|
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
|
|
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
|
|
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
|
|
#define CONFIG_USB_STORAGE 1
|
|
#define CONFIG_CMD_FAT 1
|
|
|
|
#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
|
|
|
|
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
|
#define CONFIG_SYS_MEMTEST_END 0x73e00000
|
|
|
|
#define CONFIG_SYS_USE_DATAFLASH 1
|
|
#undef CONFIG_SYS_USE_NORFLASH
|
|
|
|
#ifdef CONFIG_SYS_USE_DATAFLASH
|
|
|
|
/* bootstrap + u-boot + env + linux in dataflash */
|
|
#define CONFIG_ENV_IS_IN_DATAFLASH 1
|
|
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
|
|
#define CONFIG_ENV_OFFSET 0x4200
|
|
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
|
|
#define CONFIG_ENV_SIZE 0x4200
|
|
#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm"
|
|
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
|
|
"root=/dev/mtdblock1 " \
|
|
"mtdparts=physmap-flash.0:-(nor);" \
|
|
"at91_nand:-(root) " \
|
|
"rw rootfstype=jffs2"
|
|
|
|
#else
|
|
|
|
/* bootstrap + u-boot + env + linux in norflash */
|
|
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
#define CONFIG_SYS_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
|
|
#define CONFIG_ENV_OFFSET 0x4000
|
|
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_ENV_OFFSET)
|
|
#define CONFIG_ENV_SIZE 0x4000
|
|
#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
|
|
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
|
|
"root=/dev/mtdblock4 " \
|
|
"mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
|
|
"16k(env),224k(uboot)ro,-(linux);" \
|
|
"at91_nand:-(root) " \
|
|
"rw rootfstype=jffs2"
|
|
|
|
#endif
|
|
|
|
#define CONFIG_BAUDRATE 115200
|
|
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
|
|
|
#define CONFIG_SYS_PROMPT "U-Boot> "
|
|
#define CONFIG_SYS_CBSIZE 256
|
|
#define CONFIG_SYS_MAXARGS 16
|
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
|
#define CONFIG_SYS_LONGHELP 1
|
|
#define CONFIG_CMDLINE_EDITING 1
|
|
|
|
/*
|
|
* Size of malloc() pool
|
|
*/
|
|
#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000)
|
|
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
|
|
|
|
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
|
|
|
#ifdef CONFIG_USE_IRQ
|
|
#error CONFIG_USE_IRQ not supported
|
|
#endif
|
|
|
|
#endif
|