u-boot-brain/drivers/ddr
Marek Vasut e026b984e6 ddr: altera: Repair DQ window centering code
The code uses a lot of signed numbers, which ended up in variables
of unsigned type, which resulted in all sorts of underflows. This
in turn caused incorrect calibration on certain boards. Moreover,
repair the readout of the DQ delay, which was being pulled from
wrong register.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:45 +02:00
..
altera ddr: altera: Repair DQ window centering code 2016-04-20 11:28:45 +02:00
fsl Fix typo choosen in comments and printf logs 2016-03-27 09:12:23 -04:00
marvell arm: mvebu: Fix ddr3_init() cpu config 2016-03-24 09:36:40 +01:00
microchip drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. 2016-02-01 22:14:01 +01:00