Simon Glass 5a30cee5d0 tegra: Correct logic for reading pll_misc in clock_start_pll() ... The logic for simple PLLs on T124 was broken by this commit: 722e000c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. Correct it by reading from the same pll_misc register that it writes to and adding an entry for the DP PLL in the pllinfo table. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-08-13 13:06:04 -07:00
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clock.c	tegra: Correct logic for reading pll_misc in clock_start_pll()	2015-08-13 13:06:04 -07:00
cpu.c	Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.	2015-08-05 15:22:51 -07:00
funcmux.c	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00
Kconfig	tegra: Replace 'Norrin' with 'Nyan-big' and fix typo	2015-06-09 09:56:15 -07:00
Makefile	tegra124: Add PSCI support for Tegra124	2015-05-13 09:24:15 -07:00
pinmux.c	ARM: tegra: enable MIPI PAD CTRL support for Tegra124	2015-03-30 09:54:06 -07:00
psci.c	tegra124: Add PSCI support for Tegra124	2015-05-13 09:24:15 -07:00
xusb-padctl.c	ARM: tegra: collect SoC sources into mach-tegra	2015-02-21 08:23:51 -05:00