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https://github.com/brain-hackers/u-boot-brain
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d9abba8254
This patch adds generic support for the Samsung s3c2440 processor. Global s3c24x0 changes to struct members converting from upper case to lower case. Signed-off-by: Craig Nauman <cnauman@diagraph.com> Cc: kevin.morfitt@fearnside-systems.co.uk Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
162 lines
4.3 KiB
C
162 lines
4.3 KiB
C
/*
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* (C) Copyright 2003
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* David Mueller ELSOFT AG Switzerland. d.mueller@elsoft.ch
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/************************************************
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* NAME : s3c2440.h
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* Version : 31.3.2003
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*
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* Based on S3C2440 User's manual Rev x.x
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************************************************/
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#ifndef __S3C2440_H__
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#define __S3C2440_H__
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#define S3C24X0_UART_CHANNELS 3
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#define S3C24X0_SPI_CHANNELS 2
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/* S3C2440 only supports 512 Byte HW ECC */
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#define S3C2440_ECCSIZE 512
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#define S3C2440_ECCBYTES 3
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enum s3c24x0_uarts_nr {
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S3C24X0_UART0,
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S3C24X0_UART1,
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S3C24X0_UART2
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};
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/* S3C2440 device base addresses */
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#define S3C24X0_MEMCTL_BASE 0x48000000
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#define S3C24X0_USB_HOST_BASE 0x49000000
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#define S3C24X0_INTERRUPT_BASE 0x4A000000
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#define S3C24X0_DMA_BASE 0x4B000000
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#define S3C24X0_CLOCK_POWER_BASE 0x4C000000
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#define S3C24X0_LCD_BASE 0x4D000000
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#define S3C2440_NAND_BASE 0x4E000000
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#define S3C24X0_UART_BASE 0x50000000
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#define S3C24X0_TIMER_BASE 0x51000000
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#define S3C24X0_USB_DEVICE_BASE 0x52000140
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#define S3C24X0_WATCHDOG_BASE 0x53000000
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#define S3C24X0_I2C_BASE 0x54000000
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#define S3C24X0_I2S_BASE 0x55000000
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#define S3C24X0_GPIO_BASE 0x56000000
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#define S3C24X0_RTC_BASE 0x57000000
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#define S3C2440_ADC_BASE 0x58000000
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#define S3C24X0_SPI_BASE 0x59000000
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#define S3C2440_SDI_BASE 0x5A000000
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/* include common stuff */
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#include <asm/arch/s3c24x0.h>
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static inline struct s3c24x0_memctl *s3c24x0_get_base_memctl(void)
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{
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return (struct s3c24x0_memctl *)S3C24X0_MEMCTL_BASE;
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}
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static inline struct s3c24x0_usb_host *s3c24x0_get_base_usb_host(void)
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{
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return (struct s3c24x0_usb_host *)S3C24X0_USB_HOST_BASE;
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}
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static inline struct s3c24x0_interrupt *s3c24x0_get_base_interrupt(void)
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{
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return (struct s3c24x0_interrupt *)S3C24X0_INTERRUPT_BASE;
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}
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static inline struct s3c24x0_dmas *s3c24x0_get_base_dmas(void)
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{
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return (struct s3c24x0_dmas *)S3C24X0_DMA_BASE;
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}
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static inline struct s3c24x0_clock_power *s3c24x0_get_base_clock_power(void)
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{
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return (struct s3c24x0_clock_power *)S3C24X0_CLOCK_POWER_BASE;
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}
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static inline struct s3c24x0_lcd *s3c24x0_get_base_lcd(void)
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{
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return (struct s3c24x0_lcd *)S3C24X0_LCD_BASE;
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}
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static inline struct s3c2440_nand *s3c2440_get_base_nand(void)
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{
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return (struct s3c2440_nand *)S3C2440_NAND_BASE;
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}
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static inline struct s3c24x0_uart
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*s3c24x0_get_base_uart(enum s3c24x0_uarts_nr n)
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{
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return (struct s3c24x0_uart *)(S3C24X0_UART_BASE + (n * 0x4000));
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}
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static inline struct s3c24x0_timers *s3c24x0_get_base_timers(void)
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{
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return (struct s3c24x0_timers *)S3C24X0_TIMER_BASE;
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}
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static inline struct s3c24x0_usb_device *s3c24x0_get_base_usb_device(void)
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{
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return (struct s3c24x0_usb_device *)S3C24X0_USB_DEVICE_BASE;
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}
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static inline struct s3c24x0_watchdog *s3c24x0_get_base_watchdog(void)
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{
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return (struct s3c24x0_watchdog *)S3C24X0_WATCHDOG_BASE;
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}
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static inline struct s3c24x0_i2c *s3c24x0_get_base_i2c(void)
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{
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return (struct s3c24x0_i2c *)S3C24X0_I2C_BASE;
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}
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static inline struct s3c24x0_i2s *s3c24x0_get_base_i2s(void)
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{
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return (struct s3c24x0_i2s *)S3C24X0_I2S_BASE;
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}
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static inline struct s3c24x0_gpio *s3c24x0_get_base_gpio(void)
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{
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return (struct s3c24x0_gpio *)S3C24X0_GPIO_BASE;
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}
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static inline struct s3c24x0_rtc *s3c24x0_get_base_rtc(void)
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{
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return (struct s3c24x0_rtc *)S3C24X0_RTC_BASE;
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}
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static inline struct s3c2440_adc *s3c2440_get_base_adc(void)
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{
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return (struct s3c2440_adc *)S3C2440_ADC_BASE;
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}
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static inline struct s3c24x0_spi *s3c24x0_get_base_spi(void)
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{
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return (struct s3c24x0_spi *)S3C24X0_SPI_BASE;
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}
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static inline struct s3c2440_sdi *s3c2440_get_base_sdi(void)
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{
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return (struct s3c2440_sdi *)S3C2440_SDI_BASE;
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}
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#endif /*__S3C2440_H__*/
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