mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-23 10:28:51 +09:00
![Teresa Remmet](/assets/img/avatar_default.png)
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
104 lines
2.6 KiB
Plaintext
104 lines
2.6 KiB
Plaintext
CONFIG_ARM=y
|
|
CONFIG_ARCH_IMX8M=y
|
|
CONFIG_SYS_TEXT_BASE=0x40200000
|
|
CONFIG_SPL_GPIO_SUPPORT=y
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_SYS_MALLOC_F_LEN=0x10000
|
|
CONFIG_ENV_SIZE=0x10000
|
|
CONFIG_ENV_OFFSET=0x3C0000
|
|
CONFIG_SYS_I2C_MXC_I2C1=y
|
|
CONFIG_SYS_I2C_MXC_I2C2=y
|
|
CONFIG_SYS_I2C_MXC_I2C3=y
|
|
CONFIG_DM_GPIO=y
|
|
CONFIG_SPL_TEXT_BASE=0x7E1000
|
|
CONFIG_TARGET_PHYCORE_IMX8MM=y
|
|
CONFIG_SPL_MMC_SUPPORT=y
|
|
CONFIG_SPL_SERIAL_SUPPORT=y
|
|
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
|
CONFIG_SPL=y
|
|
CONFIG_ENV_OFFSET_REDUND=0x3E0000
|
|
CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm"
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
|
|
CONFIG_OF_SYSTEM_SETUP=y
|
|
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
|
|
CONFIG_DEFAULT_FDT_FILE="oftree"
|
|
CONFIG_BOARD_LATE_INIT=y
|
|
CONFIG_SPL_BOARD_INIT=y
|
|
CONFIG_SPL_SEPARATE_BSS=y
|
|
CONFIG_SPL_I2C_SUPPORT=y
|
|
CONFIG_SPL_POWER_SUPPORT=y
|
|
CONFIG_SPL_WATCHDOG_SUPPORT=y
|
|
CONFIG_HUSH_PARSER=y
|
|
CONFIG_SYS_PROMPT="u-boot=> "
|
|
# CONFIG_CMD_EXPORTENV is not set
|
|
# CONFIG_CMD_IMPORTENV is not set
|
|
# CONFIG_CMD_CRC32 is not set
|
|
CONFIG_CMD_EEPROM=y
|
|
CONFIG_CMD_FUSE=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_DHCP=y
|
|
CONFIG_CMD_MII=y
|
|
CONFIG_CMD_PING=y
|
|
CONFIG_CMD_CACHE=y
|
|
CONFIG_CMD_REGULATOR=y
|
|
CONFIG_CMD_EXT2=y
|
|
CONFIG_CMD_EXT4=y
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
CONFIG_CMD_FAT=y
|
|
CONFIG_OF_CONTROL=y
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_ENV_OVERWRITE=y
|
|
CONFIG_ENV_IS_IN_MMC=y
|
|
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
CONFIG_SYS_MMC_ENV_DEV=2
|
|
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
|
CONFIG_SPL_DM=y
|
|
CONFIG_SPL_CLK_COMPOSITE_CCF=y
|
|
CONFIG_CLK_COMPOSITE_CCF=y
|
|
CONFIG_SPL_CLK_IMX8MM=y
|
|
CONFIG_CLK_IMX8MM=y
|
|
CONFIG_MXC_GPIO=y
|
|
CONFIG_DM_I2C=y
|
|
CONFIG_SYS_I2C_MXC=y
|
|
CONFIG_MISC=y
|
|
CONFIG_I2C_EEPROM=y
|
|
CONFIG_SYS_I2C_EEPROM_ADDR=0x51
|
|
CONFIG_SYS_EEPROM_SIZE=4096
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
|
|
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
|
|
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
|
|
CONFIG_DM_MMC=y
|
|
CONFIG_SUPPORT_EMMC_BOOT=y
|
|
CONFIG_MMC_IO_VOLTAGE=y
|
|
CONFIG_MMC_UHS_SUPPORT=y
|
|
CONFIG_MMC_HS400_ES_SUPPORT=y
|
|
CONFIG_MMC_HS400_SUPPORT=y
|
|
CONFIG_FSL_ESDHC_IMX=y
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_PHY_TI_DP83867=y
|
|
CONFIG_DM_ETH=y
|
|
CONFIG_PHY_GIGE=y
|
|
CONFIG_FEC_MXC=y
|
|
CONFIG_MII=y
|
|
CONFIG_PINCTRL=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_PINCTRL_IMX8M=y
|
|
CONFIG_DM_REGULATOR=y
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
CONFIG_DM_REGULATOR_GPIO=y
|
|
CONFIG_MXC_UART=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_SPL_SYSRESET=y
|
|
CONFIG_SYSRESET_PSCI=y
|
|
CONFIG_SYSRESET_WATCHDOG=y
|
|
CONFIG_DM_THERMAL=y
|
|
CONFIG_IMX_WATCHDOG=y
|