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https://github.com/brain-hackers/u-boot-brain
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On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) are provided by a superio chip connected to the LPC bus. We must program the superio chip so that serial ports are available for us. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
20 lines
481 B
C
20 lines
481 B
C
/*
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SMSC_LPC47M_H_
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#define _SMSC_LPC47M_H_
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/**
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* Configure the base I/O port of the specified serial device and enable the
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* serial device.
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*
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* @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
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* @iobase: Processor I/O port address to assign to this serial device.
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*/
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void lpc47m_enable_serial(u16 dev, u16 iobase);
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#endif /* _SMSC_LPC47M_H_ */
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