Philipp Tomsich ddfe77df15 rockchip: clk: rk3368: implement bandwidth adjust for PLLs ... The RK3368 TRM recommends to configure the bandwith adjustment (CON2) for PLLs to NF/2. This implements this for all reconfigurations of PLLs and removes the 'has_bwadj' flag (as the RK3368 always has the bandwidth-adjustment feature according to its manual). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2017-08-13 17:12:28 +02:00
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aspeed	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
at91	clk: Modify xlate() method for livetree	2017-06-01 07:03:14 -06:00
exynos	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
renesas	clk: rmobile: Add RCar Gen3 clock driver	2017-08-03 04:26:24 +09:00
rockchip	rockchip: clk: rk3368: implement bandwidth adjust for PLLs	2017-08-13 17:12:28 +02:00
tegra	clock: implement a driver for the Tegra CAR	2016-09-27 09:11:02 -07:00
uniphier	ARM: uniphier: fix various sparse warnings	2017-06-25 06:06:09 +09:00
clk_bcm6345.c	dm: Rename dev_addr..() functions	2017-06-01 07:03:01 -06:00
clk_boston.c	clk: boston: Providea simple driver for Boston board clocks	2016-09-21 15:04:32 +02:00
clk_fixed_rate.c	dm: clk: fixed: Update to support livetree	2017-06-01 07:03:14 -06:00
clk_pic32.c	dm: core: Replace of_offset with accessor	2017-02-08 06:12:14 -07:00
clk_sandbox_test.c	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
clk_sandbox.c	clk: sandbox: don't check clk ID against 0	2016-06-24 17:24:35 -04:00
clk_stm32f7.c	clk: stm32f7: remove clock_get()	2017-07-26 11:28:08 -04:00
clk_zynq.c	dm: clk: Update uclass to support livetree	2017-06-01 07:03:14 -06:00
clk_zynqmp.c	clk: zynqmp: Remove unused macros/variables	2017-08-02 09:11:52 +02:00
clk-uclass.c	clk: fix compilation errors for poplar platform	2017-07-28 23:34:46 +02:00
Kconfig	spl: dm: Kconfig: split CLK support for SPL and TPL	2017-08-13 17:12:20 +02:00
Makefile	spl: dm: Kconfig: split CLK support for SPL and TPL	2017-08-13 17:12:20 +02:00