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https://github.com/brain-hackers/u-boot-brain
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5f24d0cb9c
Introduce clk implementation for i.MX8MM, including pll configuration, ccm configuration. Mostly will be done clk dm driver, but such as DRAM part, we still use non clk dm driver, because we have limited sram. Signed-off-by: Peng Fan <peng.fan@nxp.com>
9 lines
192 B
Makefile
9 lines
192 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright 2017 NXP
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obj-y += lowlevel_init.o
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obj-y += clock_slice.o soc.o
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obj-$(CONFIG_IMX8MQ) += clock_imx8mq.o
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obj-$(CONFIG_IMX8MM) += clock_imx8mm.o
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