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https://github.com/brain-hackers/u-boot-brain
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![Suneel Garapati](/assets/img/avatar_default.png)
Adds support for Network Interface controllers found on OcteonTX SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
582 lines
13 KiB
C
582 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Marvell International Ltd.
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*/
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#include <dm.h>
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#include <malloc.h>
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#include <misc.h>
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#include <net.h>
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#include <pci.h>
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#include <pci_ids.h>
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#include <phy.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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#include "nic_reg.h"
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#include "nic.h"
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#include "nicvf_queues.h"
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/* Register read/write APIs */
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void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
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{
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writeq(val, nic->reg_base + offset);
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}
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u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
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{
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return readq(nic->reg_base + offset);
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}
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void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
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u64 qidx, u64 val)
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{
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void *addr = nic->reg_base + offset;
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writeq(val, (void *)(addr + (qidx << NIC_Q_NUM_SHIFT)));
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}
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u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
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{
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void *addr = nic->reg_base + offset;
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return readq((void *)(addr + (qidx << NIC_Q_NUM_SHIFT)));
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}
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static void nicvf_handle_mbx_intr(struct nicvf *nic);
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/* VF -> PF mailbox communication */
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static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
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{
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u64 *msg = (u64 *)mbx;
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nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
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nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
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}
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int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
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{
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int timeout = NIC_PF_VF_MBX_TIMEOUT;
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int sleep = 10;
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nic->pf_acked = false;
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nic->pf_nacked = false;
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nicvf_write_to_mbx(nic, mbx);
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nic_handle_mbx_intr(nic->nicpf, nic->vf_id);
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/* Wait for previous message to be acked, timeout 2sec */
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while (!nic->pf_acked) {
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if (nic->pf_nacked)
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return -1;
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mdelay(sleep);
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nicvf_handle_mbx_intr(nic);
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if (nic->pf_acked)
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break;
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timeout -= sleep;
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if (!timeout) {
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printf("PF didn't ack to mbox msg %d from VF%d\n",
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(mbx->msg.msg & 0xFF), nic->vf_id);
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return -1;
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}
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}
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return 0;
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}
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/* Checks if VF is able to comminicate with PF
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* and also gets the VNIC number this VF is associated to.
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*/
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static int nicvf_check_pf_ready(struct nicvf *nic)
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{
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union nic_mbx mbx = {};
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mbx.msg.msg = NIC_MBOX_MSG_READY;
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if (nicvf_send_msg_to_pf(nic, &mbx)) {
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printf("PF didn't respond to READY msg\n");
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return 0;
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}
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return 1;
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}
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static void nicvf_handle_mbx_intr(struct nicvf *nic)
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{
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union nic_mbx mbx = {};
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struct eth_pdata *pdata = dev_get_platdata(nic->dev);
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u64 *mbx_data;
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u64 mbx_addr;
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int i;
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mbx_addr = NIC_VF_PF_MAILBOX_0_1;
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mbx_data = (u64 *)&mbx;
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for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
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*mbx_data = nicvf_reg_read(nic, mbx_addr);
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mbx_data++;
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mbx_addr += sizeof(u64);
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}
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debug("Mbox message: msg: 0x%x\n", mbx.msg.msg);
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switch (mbx.msg.msg) {
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case NIC_MBOX_MSG_READY:
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nic->pf_acked = true;
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nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
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nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
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nic->node = mbx.nic_cfg.node_id;
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if (!nic->set_mac_pending)
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memcpy(pdata->enetaddr,
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mbx.nic_cfg.mac_addr, 6);
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nic->loopback_supported = mbx.nic_cfg.loopback_supported;
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nic->link_up = false;
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nic->duplex = 0;
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nic->speed = 0;
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break;
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case NIC_MBOX_MSG_ACK:
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nic->pf_acked = true;
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break;
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case NIC_MBOX_MSG_NACK:
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nic->pf_nacked = true;
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break;
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case NIC_MBOX_MSG_BGX_LINK_CHANGE:
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nic->pf_acked = true;
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nic->link_up = mbx.link_status.link_up;
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nic->duplex = mbx.link_status.duplex;
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nic->speed = mbx.link_status.speed;
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if (nic->link_up) {
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printf("%s: Link is Up %d Mbps %s\n",
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nic->dev->name, nic->speed,
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nic->duplex == 1 ?
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"Full duplex" : "Half duplex");
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} else {
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printf("%s: Link is Down\n", nic->dev->name);
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}
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break;
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default:
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printf("Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
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break;
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}
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nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
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}
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static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct udevice *dev)
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{
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union nic_mbx mbx = {};
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struct eth_pdata *pdata = dev_get_platdata(dev);
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mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
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mbx.mac.vf_id = nic->vf_id;
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memcpy(mbx.mac.mac_addr, pdata->enetaddr, 6);
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return nicvf_send_msg_to_pf(nic, &mbx);
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}
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static void nicvf_config_cpi(struct nicvf *nic)
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{
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union nic_mbx mbx = {};
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mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
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mbx.cpi_cfg.vf_id = nic->vf_id;
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mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
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mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
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nicvf_send_msg_to_pf(nic, &mbx);
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}
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static int nicvf_init_resources(struct nicvf *nic)
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{
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int err;
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nic->num_qs = 1;
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/* Enable Qset */
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nicvf_qset_config(nic, true);
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/* Initialize queues and HW for data transfer */
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err = nicvf_config_data_transfer(nic, true);
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if (err) {
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printf("Failed to alloc/config VF's QSet resources\n");
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return err;
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}
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return 0;
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}
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static void nicvf_snd_pkt_handler(struct nicvf *nic,
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struct cmp_queue *cq,
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void *cq_desc, int cqe_type)
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{
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struct cqe_send_t *cqe_tx;
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struct snd_queue *sq;
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struct sq_hdr_subdesc *hdr;
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cqe_tx = (struct cqe_send_t *)cq_desc;
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sq = &nic->qs->sq[cqe_tx->sq_idx];
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hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
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if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
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return;
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nicvf_check_cqe_tx_errs(nic, cq, cq_desc);
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nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
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}
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static int nicvf_rcv_pkt_handler(struct nicvf *nic,
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struct cmp_queue *cq, void *cq_desc,
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void **ppkt, int cqe_type)
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{
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void *pkt;
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size_t pkt_len;
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struct cqe_rx_t *cqe_rx = (struct cqe_rx_t *)cq_desc;
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int err = 0;
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/* Check for errors */
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err = nicvf_check_cqe_rx_errs(nic, cq, cq_desc);
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if (err && !cqe_rx->rb_cnt)
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return -1;
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pkt = nicvf_get_rcv_pkt(nic, cq_desc, &pkt_len);
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if (!pkt) {
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debug("Packet not received\n");
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return -1;
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}
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if (pkt)
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*ppkt = pkt;
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return pkt_len;
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}
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int nicvf_cq_handler(struct nicvf *nic, void **ppkt, int *pkt_len)
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{
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int cq_qnum = 0;
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int processed_sq_cqe = 0;
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int processed_rq_cqe = 0;
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int processed_cqe = 0;
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unsigned long cqe_count, cqe_head;
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struct queue_set *qs = nic->qs;
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struct cmp_queue *cq = &qs->cq[cq_qnum];
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struct cqe_rx_t *cq_desc;
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/* Get num of valid CQ entries expect next one to be SQ completion */
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cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_qnum);
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cqe_count &= 0xFFFF;
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if (!cqe_count)
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return 0;
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/* Get head of the valid CQ entries */
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cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_qnum);
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cqe_head >>= 9;
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cqe_head &= 0xFFFF;
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if (cqe_count) {
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/* Get the CQ descriptor */
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cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
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cqe_head++;
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cqe_head &= (cq->dmem.q_len - 1);
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/* Initiate prefetch for next descriptor */
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prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
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switch (cq_desc->cqe_type) {
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case CQE_TYPE_RX:
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debug("%s: Got Rx CQE\n", nic->dev->name);
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*pkt_len = nicvf_rcv_pkt_handler(nic, cq, cq_desc,
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ppkt, CQE_TYPE_RX);
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processed_rq_cqe++;
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break;
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case CQE_TYPE_SEND:
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debug("%s: Got Tx CQE\n", nic->dev->name);
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nicvf_snd_pkt_handler(nic, cq, cq_desc, CQE_TYPE_SEND);
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processed_sq_cqe++;
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break;
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default:
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debug("%s: Got CQ type %u\n", nic->dev->name,
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cq_desc->cqe_type);
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break;
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}
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processed_cqe++;
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}
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/* Dequeue CQE */
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nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
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cq_qnum, processed_cqe);
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asm volatile ("dsb sy");
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return (processed_sq_cqe | processed_rq_cqe);
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}
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/* Qset error interrupt handler
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*
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* As of now only CQ errors are handled
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*/
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void nicvf_handle_qs_err(struct nicvf *nic)
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{
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struct queue_set *qs = nic->qs;
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int qidx;
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u64 status;
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/* Check if it is CQ err */
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for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
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status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
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qidx);
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if (!(status & CQ_ERR_MASK))
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continue;
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/* Process already queued CQEs and reconfig CQ */
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nicvf_sq_disable(nic, qidx);
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nicvf_cmp_queue_config(nic, qs, qidx, true);
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nicvf_sq_free_used_descs(nic->dev, &qs->sq[qidx], qidx);
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nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
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}
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}
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static int nicvf_free_pkt(struct udevice *dev, uchar *pkt, int pkt_len)
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{
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struct nicvf *nic = dev_get_priv(dev);
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if (pkt && pkt_len)
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free(pkt);
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nicvf_refill_rbdr(nic);
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return 0;
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}
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static int nicvf_xmit(struct udevice *dev, void *pkt, int pkt_len)
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{
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struct nicvf *nic = dev_get_priv(dev);
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int ret = 0;
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int rcv_len = 0;
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unsigned int timeout = 5000;
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void *rpkt = NULL;
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if (!nicvf_sq_append_pkt(nic, pkt, pkt_len)) {
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printf("VF%d: TX ring full\n", nic->vf_id);
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return -1;
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}
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/* check and update CQ for pkt sent */
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while (!ret && timeout--) {
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ret = nicvf_cq_handler(nic, &rpkt, &rcv_len);
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if (!ret) {
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debug("%s: %d, Not sent\n", __func__, __LINE__);
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udelay(10);
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}
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}
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return 0;
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}
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static int nicvf_recv(struct udevice *dev, int flags, uchar **packetp)
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{
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struct nicvf *nic = dev_get_priv(dev);
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void *pkt;
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int pkt_len = 0;
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#ifdef DEBUG
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u8 *dpkt;
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int i, j;
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#endif
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nicvf_cq_handler(nic, &pkt, &pkt_len);
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if (pkt_len) {
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#ifdef DEBUG
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dpkt = pkt;
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printf("RX packet contents:\n");
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for (i = 0; i < 8; i++) {
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puts("\t");
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for (j = 0; j < 10; j++)
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printf("%02x ", dpkt[i * 10 + j]);
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puts("\n");
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}
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#endif
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*packetp = pkt;
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}
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return pkt_len;
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}
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void nicvf_stop(struct udevice *dev)
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{
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struct nicvf *nic = dev_get_priv(dev);
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if (!nic->open)
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return;
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/* Free resources */
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nicvf_config_data_transfer(nic, false);
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/* Disable HW Qset */
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nicvf_qset_config(nic, false);
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nic->open = false;
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}
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int nicvf_open(struct udevice *dev)
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{
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int err;
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struct nicvf *nic = dev_get_priv(dev);
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nicvf_hw_set_mac_addr(nic, dev);
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/* Configure CPI alorithm */
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nic->cpi_alg = CPI_ALG_NONE;
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nicvf_config_cpi(nic);
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/* Initialize the queues */
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err = nicvf_init_resources(nic);
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if (err)
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return -1;
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if (!nicvf_check_pf_ready(nic))
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return -1;
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nic->open = true;
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/* Make sure queue initialization is written */
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asm volatile("dsb sy");
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return 0;
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}
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int nicvf_write_hwaddr(struct udevice *dev)
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{
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unsigned char ethaddr[ARP_HLEN];
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct nicvf *nic = dev_get_priv(dev);
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/* If lower level firmware fails to set proper MAC
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* u-boot framework updates MAC to random address.
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* Use this hook to update mac address in environment.
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*/
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if (!eth_env_get_enetaddr_by_index("eth", dev->seq, ethaddr)) {
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eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
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debug("%s: pMAC %pM\n", __func__, pdata->enetaddr);
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}
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eth_env_get_enetaddr_by_index("eth", dev->seq, ethaddr);
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if (memcmp(ethaddr, pdata->enetaddr, ARP_HLEN)) {
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debug("%s: pMAC %pM\n", __func__, pdata->enetaddr);
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nicvf_hw_set_mac_addr(nic, dev);
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}
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return 0;
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}
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static void nicvf_probe_mdio_devices(void)
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{
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struct udevice *pdev;
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int err;
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static int probed;
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if (probed)
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return;
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err = dm_pci_find_device(PCI_VENDOR_ID_CAVIUM,
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PCI_DEVICE_ID_CAVIUM_SMI, 0,
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&pdev);
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if (err)
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debug("%s couldn't find SMI device\n", __func__);
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probed = 1;
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}
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int nicvf_initialize(struct udevice *dev)
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{
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struct nicvf *nicvf = dev_get_priv(dev);
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struct eth_pdata *pdata = dev_get_platdata(dev);
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int ret = 0, bgx, lmac;
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char name[16];
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unsigned char ethaddr[ARP_HLEN];
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struct udevice *pfdev;
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struct nicpf *pf;
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static int vfid;
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if (dm_pci_find_device(PCI_VENDOR_ID_CAVIUM,
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PCI_DEVICE_ID_CAVIUM_NIC, 0, &pfdev)) {
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printf("%s NIC PF device not found..VF probe failed\n",
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__func__);
|
|
return -1;
|
|
}
|
|
pf = dev_get_priv(pfdev);
|
|
nicvf->vf_id = vfid++;
|
|
nicvf->dev = dev;
|
|
nicvf->nicpf = pf;
|
|
|
|
nicvf_probe_mdio_devices();
|
|
|
|
/* Enable TSO support */
|
|
nicvf->hw_tso = true;
|
|
|
|
nicvf->reg_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0,
|
|
PCI_REGION_MEM);
|
|
|
|
debug("nicvf->reg_base: %p\n", nicvf->reg_base);
|
|
|
|
if (!nicvf->reg_base) {
|
|
printf("Cannot map config register space, aborting\n");
|
|
ret = -1;
|
|
goto fail;
|
|
}
|
|
|
|
ret = nicvf_set_qset_resources(nicvf);
|
|
if (ret)
|
|
return -1;
|
|
|
|
sprintf(name, "vnic%u", nicvf->vf_id);
|
|
debug("%s name %s\n", __func__, name);
|
|
device_set_name(dev, name);
|
|
|
|
bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]);
|
|
lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(pf->vf_lmac_map[nicvf->vf_id]);
|
|
debug("%s VF %d BGX %d LMAC %d\n", __func__, nicvf->vf_id, bgx, lmac);
|
|
debug("%s PF %p pfdev %p VF %p vfdev %p vf->pdata %p\n",
|
|
__func__, nicvf->nicpf, nicvf->nicpf->udev, nicvf, nicvf->dev,
|
|
pdata);
|
|
|
|
fdt_board_get_ethaddr(bgx, lmac, ethaddr);
|
|
|
|
debug("%s bgx %d lmac %d ethaddr %pM\n", __func__, bgx, lmac, ethaddr);
|
|
|
|
if (is_valid_ethaddr(ethaddr)) {
|
|
memcpy(pdata->enetaddr, ethaddr, ARP_HLEN);
|
|
eth_env_set_enetaddr_by_index("eth", dev->seq, ethaddr);
|
|
}
|
|
debug("%s enetaddr %pM ethaddr %pM\n", __func__,
|
|
pdata->enetaddr, ethaddr);
|
|
|
|
fail:
|
|
return ret;
|
|
}
|
|
|
|
int octeontx_vnic_probe(struct udevice *dev)
|
|
{
|
|
return nicvf_initialize(dev);
|
|
}
|
|
|
|
static const struct eth_ops octeontx_vnic_ops = {
|
|
.start = nicvf_open,
|
|
.stop = nicvf_stop,
|
|
.send = nicvf_xmit,
|
|
.recv = nicvf_recv,
|
|
.free_pkt = nicvf_free_pkt,
|
|
.write_hwaddr = nicvf_write_hwaddr,
|
|
};
|
|
|
|
U_BOOT_DRIVER(octeontx_vnic) = {
|
|
.name = "vnic",
|
|
.id = UCLASS_ETH,
|
|
.probe = octeontx_vnic_probe,
|
|
.ops = &octeontx_vnic_ops,
|
|
.priv_auto_alloc_size = sizeof(struct nicvf),
|
|
.platdata_auto_alloc_size = sizeof(struct eth_pdata),
|
|
};
|
|
|
|
static struct pci_device_id octeontx_vnic_supported[] = {
|
|
{ PCI_VDEVICE(CAVIUM, PCI_DEVICE_ID_CAVIUM_NICVF) },
|
|
{ PCI_VDEVICE(CAVIUM, PCI_DEVICE_ID_CAVIUM_NICVF_1) },
|
|
{}
|
|
};
|
|
|
|
U_BOOT_PCI_DEVICE(octeontx_vnic, octeontx_vnic_supported);
|