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![Masahiro Yamada](/assets/img/avatar_default.png)
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig. We do not need two options for the same feature. Deprecate the former. This commit was generated with the sed script 's/GENERIC_MMC/MMC/' and manual fixup of drivers/mmc/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
206 lines
5.1 KiB
C
206 lines
5.1 KiB
C
/*
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* (C) Copyright 2012
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* Corscience GmbH & Co. KG, <www.corscience.de>
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* Thomas Weber <weber@corscience.de>
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* Sunil Kumar <sunilsaini05@gmail.com>
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* Shashi Ranjan <shashiranjanmca05@gmail.com>
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*
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* Derived from Devkit8000 code by
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* Frederik Kriewitz <frederik@kriewitz.eu>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mem.h>
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#include "tricorder.h"
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#include "tricorder-eeprom.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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/**
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* get_eeprom - read the eeprom
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*
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* @eeprom - pointer to a eeprom struct to fill
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*
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* This function will panic() on wrong EEPROM content
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*/
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static void get_eeprom(struct tricorder_eeprom *eeprom)
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{
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int ret;
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if (!eeprom)
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panic("No eeprom given!\n");
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ret = gpio_request(7, "BMS");
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if (ret)
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panic("gpio: requesting BMS pin failed\n");
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ret = gpio_direction_input(7);
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if (ret)
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panic("gpio: set BMS as input failed\n");
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ret = gpio_get_value(7);
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if (ret < 0)
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panic("gpio: get BMS pin state failed\n");
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gpio_free(7);
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if (ret == 0) {
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/* BMS is _not_ set, do the EEPROM check */
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ret = tricorder_get_eeprom(0x51, eeprom);
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if (!ret) {
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if (strncmp(eeprom->board_name, "CS10411", 7) != 0)
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panic("Wrong board name '%.*s'\n",
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sizeof(eeprom->board_name),
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eeprom->board_name);
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if (eeprom->board_version[0] < 'D')
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panic("Wrong board version '%.*s'\n",
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sizeof(eeprom->board_version),
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eeprom->board_version);
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} else {
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panic("Could not get board revision\n");
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}
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} else {
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memset(eeprom, 0, TRICORDER_EEPROM_SIZE);
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}
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}
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/**
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* print_hwversion - print out a HW version string
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*
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* @eeprom - pointer to the eeprom
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*/
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static void print_hwversion(struct tricorder_eeprom *eeprom)
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{
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size_t len;
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if (!eeprom)
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panic("No eeprom given!");
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printf("Board %.*s:%.*s serial %.*s",
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sizeof(eeprom->board_name), eeprom->board_name,
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sizeof(eeprom->board_version), eeprom->board_version,
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sizeof(eeprom->board_serial), eeprom->board_serial);
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len = strnlen(eeprom->interface_version,
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sizeof(eeprom->interface_version));
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if (len > 0)
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printf(" HW interface version %.*s",
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sizeof(eeprom->interface_version),
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eeprom->interface_version);
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puts("\n");
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}
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/*
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* Routine: misc_init_r
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* Description: Configure board specific parts
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*/
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int misc_init_r(void)
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{
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struct tricorder_eeprom eeprom;
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get_eeprom(&eeprom);
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print_hwversion(&eeprom);
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twl4030_power_init();
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status_led_set(0, CONFIG_LED_STATUS_ON);
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status_led_set(1, CONFIG_LED_STATUS_ON);
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status_led_set(2, CONFIG_LED_STATUS_ON);
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omap_die_id_display();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_TRICORDER();
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}
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#if defined(CONFIG_MMC)
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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#endif
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#if defined(CONFIG_MMC)
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void board_mmc_power_init(void)
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{
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twl4030_power_mmc_init(0);
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}
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#endif
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/*
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* Routine: get_board_mem_timings
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* Description: If we use SPL then there is no x-loader nor config header
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* so we have to setup the DDR timings ourself on the first bank. This
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* provides the timing values back to the function that configures
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* the memory. We have either one or two banks of 128MB DDR.
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*/
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void get_board_mem_timings(struct board_sdrc_timings *timings)
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{
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struct tricorder_eeprom eeprom;
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get_eeprom(&eeprom);
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/* General SDRC config */
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if (eeprom.board_version[0] > 'D') {
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/* use optimized timings for our SDRAM device */
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timings->mcfg = MCFG((256 << 20), 14);
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#define MT46H64M32_TDAL 6 /* Twr/Tck + Trp/tck */
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/* 15/6 + 18/6 = 5.5 -> 6 */
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#define MT46H64M32_TDPL 3 /* 15/6 = 2.5 -> 3 (Twr) */
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#define MT46H64M32_TRRD 2 /* 12/6 = 2 */
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#define MT46H64M32_TRCD 3 /* 18/6 = 3 */
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#define MT46H64M32_TRP 3 /* 18/6 = 3 */
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#define MT46H64M32_TRAS 7 /* 42/6 = 7 */
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#define MT46H64M32_TRC 10 /* 60/6 = 10 */
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#define MT46H64M32_TRFC 12 /* 72/6 = 12 */
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timings->ctrla = ACTIM_CTRLA(MT46H64M32_TRFC, MT46H64M32_TRC,
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MT46H64M32_TRAS, MT46H64M32_TRP,
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MT46H64M32_TRCD, MT46H64M32_TRRD,
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MT46H64M32_TDPL,
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MT46H64M32_TDAL);
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#define MT46H64M32_TWTR 1
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#define MT46H64M32_TCKE 1
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#define MT46H64M32_XSR 19 /* 112.5/6 = 18.75 => ~19 */
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#define MT46H64M32_TXP 1
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timings->ctrlb = ACTIM_CTRLB(MT46H64M32_TWTR, MT46H64M32_TCKE,
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MT46H64M32_TXP, MT46H64M32_XSR);
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timings->mr = MICRON_V_MR_165;
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timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
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} else {
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/* use conservative beagleboard timings as default */
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timings->mcfg = MICRON_V_MCFG_165(128 << 20);
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timings->ctrla = MICRON_V_ACTIMA_165;
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timings->ctrlb = MICRON_V_ACTIMB_165;
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timings->mr = MICRON_V_MR_165;
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timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
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}
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}
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