mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
269 lines
7.5 KiB
C
269 lines
7.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Porting to u-boot:
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*
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* (C) Copyright 2010
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* Stefano Babic, DENX Software Engineering, sbabic@denx.de
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*
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* Linux IPU driver for MX51:
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*
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* (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
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*/
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#ifndef __ASM_ARCH_IPU_H__
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#define __ASM_ARCH_IPU_H__
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#include <linux/types.h>
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#include <ipu_pixfmt.h>
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#define IDMA_CHAN_INVALID 0xFF
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#define HIGH_RESOLUTION_WIDTH 1024
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struct clk {
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const char *name;
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int id;
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/* Source clock this clk depends on */
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struct clk *parent;
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/* Secondary clock to enable/disable with this clock */
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struct clk *secondary;
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/* Current clock rate */
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unsigned long rate;
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/* Reference count of clock enable/disable */
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__s8 usecount;
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/* Register bit position for clock's enable/disable control. */
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u8 enable_shift;
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/* Register address for clock's enable/disable control. */
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void *enable_reg;
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u32 flags;
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/*
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* Function ptr to recalculate the clock's rate based on parent
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* clock's rate
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*/
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void (*recalc) (struct clk *);
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/*
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* Function ptr to set the clock to a new rate. The rate must match a
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* supported rate returned from round_rate. Leave blank if clock is not
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* programmable
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*/
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int (*set_rate) (struct clk *, unsigned long);
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/*
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* Function ptr to round the requested clock rate to the nearest
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* supported rate that is less than or equal to the requested rate.
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*/
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unsigned long (*round_rate) (struct clk *, unsigned long);
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/*
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* Function ptr to enable the clock. Leave blank if clock can not
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* be gated.
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*/
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int (*enable) (struct clk *);
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/*
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* Function ptr to disable the clock. Leave blank if clock can not
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* be gated.
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*/
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void (*disable) (struct clk *);
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/* Function ptr to set the parent clock of the clock. */
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int (*set_parent) (struct clk *, struct clk *);
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};
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/*
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* Enumeration of Synchronous (Memory-less) panel types
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*/
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typedef enum {
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IPU_PANEL_SHARP_TFT,
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IPU_PANEL_TFT,
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} ipu_panel_t;
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/*
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* IPU Driver channels definitions.
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* Note these are different from IDMA channels
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*/
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#define IPU_MAX_CH 32
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#define _MAKE_CHAN(num, v_in, g_in, a_in, out) \
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((num << 24) | (v_in << 18) | (g_in << 12) | (a_in << 6) | out)
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#define _MAKE_ALT_CHAN(ch) (ch | (IPU_MAX_CH << 24))
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#define IPU_CHAN_ID(ch) (ch >> 24)
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#define IPU_CHAN_ALT(ch) (ch & 0x02000000)
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#define IPU_CHAN_ALPHA_IN_DMA(ch) ((uint32_t) (ch >> 6) & 0x3F)
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#define IPU_CHAN_GRAPH_IN_DMA(ch) ((uint32_t) (ch >> 12) & 0x3F)
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#define IPU_CHAN_VIDEO_IN_DMA(ch) ((uint32_t) (ch >> 18) & 0x3F)
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#define IPU_CHAN_OUT_DMA(ch) ((uint32_t) (ch & 0x3F))
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#define NO_DMA 0x3F
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#define ALT 1
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/*
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* Enumeration of IPU logical channels. An IPU logical channel is defined as a
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* combination of an input (memory to IPU), output (IPU to memory), and/or
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* secondary input IDMA channels and in some cases an Image Converter task.
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* Some channels consist of only an input or output.
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*/
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typedef enum {
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CHAN_NONE = -1,
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MEM_DC_SYNC = _MAKE_CHAN(7, 28, NO_DMA, NO_DMA, NO_DMA),
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MEM_DC_ASYNC = _MAKE_CHAN(8, 41, NO_DMA, NO_DMA, NO_DMA),
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MEM_BG_SYNC = _MAKE_CHAN(9, 23, NO_DMA, 51, NO_DMA),
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MEM_FG_SYNC = _MAKE_CHAN(10, 27, NO_DMA, 31, NO_DMA),
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MEM_BG_ASYNC0 = _MAKE_CHAN(11, 24, NO_DMA, 52, NO_DMA),
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MEM_FG_ASYNC0 = _MAKE_CHAN(12, 29, NO_DMA, 33, NO_DMA),
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MEM_BG_ASYNC1 = _MAKE_ALT_CHAN(MEM_BG_ASYNC0),
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MEM_FG_ASYNC1 = _MAKE_ALT_CHAN(MEM_FG_ASYNC0),
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DIRECT_ASYNC0 = _MAKE_CHAN(13, NO_DMA, NO_DMA, NO_DMA, NO_DMA),
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DIRECT_ASYNC1 = _MAKE_CHAN(14, NO_DMA, NO_DMA, NO_DMA, NO_DMA),
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} ipu_channel_t;
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/*
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* Enumeration of types of buffers for a logical channel.
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*/
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typedef enum {
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IPU_OUTPUT_BUFFER = 0, /*< Buffer for output from IPU */
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IPU_ALPHA_IN_BUFFER = 1, /*< Buffer for input to IPU */
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IPU_GRAPH_IN_BUFFER = 2, /*< Buffer for input to IPU */
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IPU_VIDEO_IN_BUFFER = 3, /*< Buffer for input to IPU */
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IPU_INPUT_BUFFER = IPU_VIDEO_IN_BUFFER,
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IPU_SEC_INPUT_BUFFER = IPU_GRAPH_IN_BUFFER,
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} ipu_buffer_t;
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#define IPU_PANEL_SERIAL 1
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#define IPU_PANEL_PARALLEL 2
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struct ipu_channel {
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u8 video_in_dma;
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u8 alpha_in_dma;
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u8 graph_in_dma;
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u8 out_dma;
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};
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enum ipu_dmfc_type {
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DMFC_NORMAL = 0,
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DMFC_HIGH_RESOLUTION_DC,
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DMFC_HIGH_RESOLUTION_DP,
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DMFC_HIGH_RESOLUTION_ONLY_DP,
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};
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/*
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* Union of initialization parameters for a logical channel.
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*/
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typedef union {
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struct {
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uint32_t di;
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unsigned char interlaced;
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} mem_dc_sync;
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struct {
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uint32_t temp;
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} mem_sdc_fg;
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struct {
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uint32_t di;
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unsigned char interlaced;
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uint32_t in_pixel_fmt;
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uint32_t out_pixel_fmt;
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unsigned char alpha_chan_en;
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} mem_dp_bg_sync;
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struct {
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uint32_t temp;
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} mem_sdc_bg;
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struct {
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uint32_t di;
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unsigned char interlaced;
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uint32_t in_pixel_fmt;
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uint32_t out_pixel_fmt;
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unsigned char alpha_chan_en;
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} mem_dp_fg_sync;
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} ipu_channel_params_t;
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/*
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* Enumeration of IPU interrupts.
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*/
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enum ipu_irq_line {
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IPU_IRQ_DP_SF_END = 448 + 3,
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IPU_IRQ_DC_FC_1 = 448 + 9,
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};
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/*
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* Bitfield of Display Interface signal polarities.
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*/
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typedef struct {
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unsigned datamask_en:1;
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unsigned ext_clk:1;
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unsigned interlaced:1;
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unsigned odd_field_first:1;
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unsigned clksel_en:1;
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unsigned clkidle_en:1;
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unsigned data_pol:1; /* true = inverted */
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unsigned clk_pol:1; /* true = rising edge */
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unsigned enable_pol:1;
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unsigned Hsync_pol:1; /* true = active high */
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unsigned Vsync_pol:1;
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} ipu_di_signal_cfg_t;
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typedef enum {
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RGB,
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YCbCr,
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YUV
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} ipu_color_space_t;
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/* Common IPU API */
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int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params);
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void ipu_uninit_channel(ipu_channel_t channel);
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int32_t ipu_init_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t pixel_fmt,
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uint16_t width, uint16_t height,
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uint32_t stride,
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dma_addr_t phyaddr_0, dma_addr_t phyaddr_1,
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uint32_t u_offset, uint32_t v_offset);
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int32_t ipu_update_channel_buffer(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t bufNum, dma_addr_t phyaddr);
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int32_t ipu_is_channel_busy(ipu_channel_t channel);
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void ipu_clear_buffer_ready(ipu_channel_t channel, ipu_buffer_t type,
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uint32_t bufNum);
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int32_t ipu_enable_channel(ipu_channel_t channel);
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int32_t ipu_disable_channel(ipu_channel_t channel);
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int32_t ipu_init_sync_panel(int disp,
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uint32_t pixel_clk,
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uint16_t width, uint16_t height,
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uint32_t pixel_fmt,
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uint16_t h_start_width, uint16_t h_sync_width,
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uint16_t h_end_width, uint16_t v_start_width,
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uint16_t v_sync_width, uint16_t v_end_width,
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uint32_t v_to_h_sync, ipu_di_signal_cfg_t sig);
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int32_t ipu_disp_set_global_alpha(ipu_channel_t channel, unsigned char enable,
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uint8_t alpha);
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int32_t ipu_disp_set_color_key(ipu_channel_t channel, unsigned char enable,
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uint32_t colorKey);
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uint32_t bytes_per_pixel(uint32_t fmt);
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void clk_enable(struct clk *clk);
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void clk_disable(struct clk *clk);
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u32 clk_get_rate(struct clk *clk);
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int clk_set_rate(struct clk *clk, unsigned long rate);
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long clk_round_rate(struct clk *clk, unsigned long rate);
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int clk_set_parent(struct clk *clk, struct clk *parent);
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int clk_get_usecount(struct clk *clk);
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struct clk *clk_get_parent(struct clk *clk);
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void ipu_dump_registers(void);
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int ipu_probe(void);
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bool ipu_clk_enabled(void);
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void ipu_dmfc_init(int dmfc_type, int first);
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void ipu_init_dc_mappings(void);
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void ipu_dmfc_set_wait4eot(int dma_chan, int width);
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void ipu_dc_init(int dc_chan, int di, unsigned char interlaced);
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void ipu_dc_uninit(int dc_chan);
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void ipu_dp_dc_enable(ipu_channel_t channel);
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int ipu_dp_init(ipu_channel_t channel, uint32_t in_pixel_fmt,
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uint32_t out_pixel_fmt);
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void ipu_dp_uninit(ipu_channel_t channel);
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void ipu_dp_dc_disable(ipu_channel_t channel, unsigned char swap);
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ipu_color_space_t format_to_colorspace(uint32_t fmt);
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#endif
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