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![]() Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
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.. | ||
ashldi3.c | ||
ashrdi3.c | ||
bootm.c | ||
cache_init.S | ||
cache.c | ||
io.c | ||
libgcc.h | ||
lshrdi3.c | ||
Makefile |